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Details, datasheet, quote on part number:SN74CBTD3384PW
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Datasheet text preview:
SN54CBTD3384, SN74CBTD3384 10-BIT FET BUS SWITCHES WITH LEVEL SHIFTING
SCDS025Q MAY 1995 REVISED JULY 2002
D D D
5- Switch Connection Between Two Ports TTL-Compatible Input Levels Designed to Be Used in Level-Shifting Applications
SN54CBTD3384 . . . JT OR W PACKAGE SN74CBTD3384 . . . DB, DBQ, DGV, DW, OR PW PACKAGE (TOP VIEW)
description/ordering information
The 'CBTD3384 devices provide ten bits of high-speed TTL-compatible bus switching. The low on-state resistance of the switches allows connections to be made without adding propagation delay. A diode to VCC is integrated on the die to allow for level shifting from 5-V signals at the device inputs to 3.3-V signals at the device outputs. These devices are organized as two 5-bit switches with separate output-enable (OE) inputs. When OE is low, the switch is on, and port A is connected to port B. When OE is high, the switch is open, and the high-impedance state exists between the two ports.
1OE 1B1 1A1 1A2 1B2 1B3 1A3 1A4 1B4 1B5 1A5 GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCC 2B5 2A5 2A4 2B4 2B3 2A3 2A2 2B2 2B1 2A1 2OE
SN54CBTD3384 . . . FK PACKAGE (TOP VIEW)
1A1 1B1 1OE NC V CC 1A2 1B2 1B3 NC 1A3 1A4 1B4
4
5 6 7 8 9
3 2 1 28 27 26
2B5 2A5
25 24 23 22 21 20
10
11 19 12 13 14 15 16 17 18
2A4 2B4 2B3 NC 2A3 2A2 2B2
NC No internal connection
ORDERING INFORMATION
TA SOIC DW DW 40°C to 85°C to 85°C SSOP DB SSOP (QSOP) DBQ TSSOP PW TVSOP DGV CDIP JT 55°C to 125°C CFP W LCCC FK PACKAGE Tube Tape and reel Tape and reel Tape and reel Tape and reel Tape and reel Tube Tube Tube ORDERABLE PART NUMBER SN74CBTD3384DW SN74CBTD3384DWR SN74CBTD3384DBR SN74CBTD3384DBQR SN74CBTD3384PWR SN74CBTD3384DGVR SNJ54CBTD3384JT SNJ54CBTD3384W SNJ54CBTD3384FK TOP-SIDE MARKING CBTD3384 CC384 CBTD3384 CC384 CC384 SNJ54CBTD3384JT SNJ54CBTD3384W SNJ54CBTD3384FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1B5 1A5 GND NC 2OE 2A1 2B1
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SN54CBTD3384, SN74CBTD3384 10-BIT FET BUS SWITCHES WITH LEVEL SHIFTING
SCDS025Q MAY 1995 REVISED JULY 2002
FUNCTION TABLE (each 5-bit bus switch) INPUTS 1OE L L H H 2OE L H L H INPUTS/OUTPUTS 1B11B5 1A11A5 1A11A5 Z Z 2B12B5 2A12A5 Z 2A12A5 Z
logic diagram (positive logic)
1A1 3 2 1B1
11 1A5 1OE 1
10
1B5
2A1
14
15
2B1
22 2A5 2OE 13
23
2B5
Pin numbers shown are for the DB, DBQ, DGV, DW, JT, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/W DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54CBTD3384, SN74CBTD3384 10-BIT FET BUS SWITCHES WITH LEVEL SHIFTING
SCDS025Q MAY 1995 REVISED JULY 2002
recommended operating conditions (see Note 3)
SN54CBTD3384 MIN VCC VIH VIL TA Supply voltage High-level control input voltage Low-level control input voltage Operating free-air temperature 55 4.5 2 0.8 125 40 MAX 5.5 SN74CBTD3384 MIN 4.5 2 0.8 85 MAX 5.5 UNIT V V V °C
In applications with fast edge rates, multiple outputs switching, and operating at high frequencies, the output may have little or no level-shifting effect. NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK VOH II ICC ICC Ci Control inputs Control inputs VCC = 4.5 V, See Figure 2 VCC = 5.5 V, VCC = 5.5 V, TEST CONDITIONS CONDITIONS II = 18 mA VI = 5.5 V or GND IO = 0, VI = VCC or GND MIN SN54CBTD3384 TYP MAX 1.2 ±1 1.5 2.5 3 OE = VCC VI = 0 II = 64 mA II = 30 mA 3.5 5 5 3 3.5 5 5 7 7 MIN SN74CBTD3384 TYP MAX 1.2 ±1 1.5 2.5 UNIT V µA mA mA pF pF
VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND VI = 3 V or 0 VO = 3 V or 0, VCC = 4.5 V
Cio(OFF) ron§
VI = 2.4 V, II = 15 mA 35 35 50 Typical values are at VCC = 5 V, TA = 25°C. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. § Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two (A or B) terminals.
switching characteristics over recommended ranges of supply voltage and operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1)
PARAMETER tpd¶ ten tdis FROM (INPUT) A or B OE OE TO (OUTPUT) B or A A or B A or B 2.2 1.5 SN54CBTD3384 MIN MAX 0.25 9.7 8.6 2.3 1.7 SN74CBTD3384 MIN MAX 0.25 7 5.3 UNIT ns ns ns
¶ The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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