Digchip : Database on electronics components
Electronic components database
Search:                      In section:
Member, Distributor  
Log In
Email:
Password:

Details, datasheet, quote on part number:SN74HC74ADBLE
 
 
Part:SN74HC74ADBLE
Category:Logic => Flip-Flops => D-Type Flip-Flops
Description:ti SN74HC74, Dual D-type Positive-edge-triggered Flip-flops With Clear And Preset
Company:Texas Instruments, Inc.
Datasheet:Download SN74HC74ADBLE datasheet   File size : 363 kB
Request For quote:  Find where to buy SN74HC74ADBLE
 



Datasheet text preview:
SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
SCLS094D ­ DECEMBER 1982 ­ REVISED JULY 2003
D D D D D D
Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 40-µA Max ICC Typical tpd = 15 ns ±4-mA Output Drive at 5 V Low Input Current of 1 µA Max
SN54HC74 . . . J OR W PACKAGE SN74HC74 . . . D, DB, N, NS, OR PW PACKAGE (TOP VIEW)
description/ordering information
The 'HC74 devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
1CLR 1D 1CLK 1PRE 1Q 1Q GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC 2CLR 2D 2CLK 2PRE 2Q 2Q
SN54HC74 . . . FK PACKAGE (TOP VIEW)
1D 1CLR NC VCC 2CLR 1CLK NC 1PRE NC 1Q
4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
2D NC 2CLK NC 2PRE
NC ­ No internal connection
ORDERING INFORMATION
TA PDIP ­ N SOIC ­ D ­40°C to 85°C SOP ­ NS SSOP ­ DB TSSOP ­ PW CDIP ­ J ­55°C to 125°C CFP ­ W LCCC ­ FK PACKAGE Tube of 25 Tube of 50 Reel of 2500 Reel of 250 Reel of 2000 Reel of 2000 Tube of 90 Reel of 2000 Reel of 250 Tube of 25 Tube of 150 Tube of 55 ORDERABLE PART NUMBER SN74HC74N SN74HC74D SN74HC74DR SN74HC74DT SN74HC74NSR SN74HC74DBR SN74HC74PW SN74HC74PWR SN74HC74PWT SNJ54HC74J SNJ54HC74W SNJ54HC74FK SNJ54HC74J SNJ54HC74W HC74 HC74 HC74 HC74 TOP-SIDE MARKING SN74HC74N
SNJ54HC74FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1Q GND NC 2Q 2Q
1
SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
SCLS094D ­ DECEMBER 1982 ­ REVISED JULY 2003
FUNCTION TABLE INPUTS PRE L H L H H CLR H L L H H CLK X X X D X X X H L OUTPUTS Q H L H H L Q L H H L H
H H L X Q0 Q0 This configuration is nonstable; that is, it does not persist when PRE or CLR returns to its inactive (high) level.
logic diagram (positive logic)
PRE CLK C C C C Q TG C C D TG TG TG Q C CLR C C
C
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­0.5 V to 7 V Input clamp current, IIK (VI VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ­65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
SCLS094D ­ DECEMBER 1982 ­ REVISED JULY 2003
recommended operating conditions (see Note 3)
SN54HC74 MIN VCC VIH Supply voltage High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO t/v Low-level input voltage Input voltage Output voltage Input transition rise/fall time VCC = 2 V VCC = 4.5 V VCC = 4.5 V VCC = 6 V 0 0 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 0 0 NOM 5 MAX 6 SN74HC74 MIN 2 1.5 3.15 4.2 0.5 1.35 1.8 VCC VCC 1000 500 ns V V V V NOM 5 MAX 6 UNIT V
VCC = 6 V 400 400 TA Operating free-air temperature ­55 125 ­40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS CONDITIONS VCC 2V IOH = ­20 µA VOH VI = VIH or VIL IOH = ­4 mA IOH = ­5.2 mA IOL = 20 µA VOL VI = VIH or VIL IOL = 4 mA IOL = 5.2 mA II ICC Ci VI = VCC or 0 VI = VCC or 0, IO = 0 4.5 V 6V 4.5 V 6V 2V 4.5 V 6V 4.5 V 6V 6V 6V 2 V to 6 V 3 MIN 1.9 4.4 5.9 3.98 5.48 TA = 25°C TYP MAX 1.998 4.499 5.999 4.3 5.8 0.002 0.001 0.001 0.17 0.15 ±0.1 0.1 0.1 0.1 0.26 0.26 ±100 4 10 SN54HC74 MIN 1.9 4.4 5.9 3.7 5.2 0.1 0.1 0.1 0.4 0.4 ±1000 80 10 MAX SN74HC74 MIN 1.9 4.4 5.9 3.84 5.34 0.1 0.1 0.1 0.33 0.33 ±1000 40 10 nA µA pF V V MAX UNIT
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3