|Category||Semiconductors => Logic => Little Logic|
|Part family||SN74LVC1G125 Single Bus Buffer Gate With 3-State Outputs|
|Title||Bus Oriented Circuits|
|Description||Single Bus Buffer Gate With 3-State Outputs 5-SOT-23 -40 to 125|
|Company||Texas Instruments, Inc.|
|Datasheet||Download SN74LVC1G125 datasheet
|Cross ref.||Similar parts: SN74LS126AD, SN74LS126ADR2, SN74LS126AM, SN74LS126AMEL, IDT74ALVC125DC, IDT74ALVC125DC8, IDT74ALVC125DCG, IDT74ALVC125PG, IDT74ALVC125PG8, IDT74ALVC126DC|
|Output Drive (IOL/IOH)(Max)(mA)||32/-32|
|ICC @ Nom Voltage(Max)(mA)||0.01|
|F @ Nom Voltage(Max)(Mhz)||150|
|Features||Ioff,down translation to Vcc,low power,3-state|
|Operating Temperature Range(C)||-40 to 125,-40 to 85|
|tpd @ Nom Voltage(Max)(ns)||9,5.5,4.5,4|
|Approx. Price (US$)||0.07 | 1ku|
|Pin nb||Package type||Ind std||JEDEC code||Package qty||Carrier||Device mark||Width (mm)||Length (mm)||Thick (mm)||Pitch (mm)|
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|HSPICE Model for SN74LVC1G125 - ZIP (05/15/2007)|
|SN74LVC1G125 PSpice Model - ZIP (06/17/2016)|
Available in the Texas Instruments NanoStar and NanoFree Packages Supports 5-V VCC Operation Inputs Accept Voltages 5.5 V Max tpd 3.3 V Low Power Consumption, 10-µA Max ICC ±24-mA Output Drive 3.3 V Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 2000-V Human-Body Model 200-V Machine Model 1000-V Charged-Device Model (C101)
This bus buffer gate is designed for to 5.5-V VCC operation. The is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION
TA NanoStar WCSP (DSBGA) YEA to 85°C NanoFree WCSP (DSBGA) YZA (Pb-free) SOT (SOT 23) DBV to 85°C PACKAGE Reel of 3000 Reel of 3000 Reel of 3000 Reel of 250 Reel of 3000 SOT (SC-70) (SC 70) DCK Reel of 250 ORDERABLE PART NUMBER CM _ _CM_ SN74LVC1G125DCKT CM CM_ C25 C25_ TOP-SIDE MARKING
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC. 6.5 V Input voltage range, VI (see Note 6.5 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 6.5 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and V to VCC 0.5 V Input clamp current, IIK (VI 50 mA Output clamp current, IOK (VO 50 mA Continuous output current, IO. ±50 mA Continuous current through VCC or GND. ±100 mA Package thermal impedance, JA (see Note 3): DBV package. 206°C/W DCK package. 252°C/W YEA/YZA package. 154°C/W Storage temperature range, Tstg. to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
MIN VCC Supply voltage Operating Data retention only VCC 1.95 V VCC 2.7 V VCC 3.6 V VCC 5.5 V VCC 1.95 V VCC 2.7 V VCC 3.6 V VCC V 0 VCC 1.65 V VCC 2.3 V IOH High-level output current VCC 3 V VCC 4.5 V VCC 1.65 V VCC 2.3 V IOL Low-level output current VCC 3 V VCC 4.5 V VCC 0.2 V t/v Input transition rise or fall rate VCC 0.3 V VCC 0.5 V VCC 0.35 × VCC 5.5 VCC ns/V mA MAX 5.5 UNIT V
TA Operating free-air temperature 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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