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Details, datasheet, quote on part number: SN74LVC1G125
CategorySemiconductors => Logic => Little Logic
Part familySN74LVC1G125 Single Bus Buffer Gate With 3-State Outputs
TitleBus Oriented Circuits
DescriptionSingle Bus Buffer Gate With 3-State Outputs 5-SOT-23 -40 to 125
CompanyTexas Instruments, Inc.
DatasheetDownload SN74LVC1G125 datasheet
Cross ref.Similar parts: SN74LS126AD, SN74LS126ADR2, SN74LS126AM, SN74LS126AMEL, IDT74ALVC125DC, IDT74ALVC125DC8, IDT74ALVC125DCG, IDT74ALVC125PG, IDT74ALVC125PG8, IDT74ALVC126DC
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Package GroupDSBGA,SC70,SON,SOT,SOT-23,X2SON
3-State OutputYes
Operating Temperature Range(C)-40 to 125,-40 to 85
Technology FamilyLVC
Schmitt TriggerNo
Input TypeCMOS/TTL
Output Drive (IOL/IOH)(Max)(mA)32/-32
Output TypeCMOS
Sub-FamilyNon-Inverting Buffer/Driver
Approx. Price (US$)0.07 | 1ku
F @ Nom Voltage(Max)(Mhz)150
tpd @ Nom Voltage(Max)(ns)9,5.5,4.5,4
ICC @ Nom Voltage(Max)(mA)0.01
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
Application notes
• LVC Characterization Information
This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic, ac performance, power co | Doc
• Input and Output Characteristics of Digital Integrated Circuits
This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given i | Doc
• How to Select Little Logic (Rev. A)
TI Little Logic devices are logic-gate devices assembled in a small single-, dual-, or triple- gate package. Little Logic devices are widely used in portable equipment, such as mobile phones, MP3 play | Doc
• Understanding Advanced Bus-Interface Products Design Guide | Doc
• Selecting the Right Texas Instruments Signal Switch
Texas Instruments offers a wide variety of electronic switches (digital, analog, bilateral, bilateral analog) in a variety of families, including CBT, CBTLV, HC, LV, and LVC. Depending on the applicat | Doc
• Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices
This application report explores the possibilities for migrating to 3.3-V and 2.5-V power supplies and discusses the implications. Customers are successfully using a wide range of low-voltage, 3.3-V | Doc
• Live Insertion
Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must | Doc
• Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this, interface terminals of th | Doc
• Use of the CMOS Unbuffered Inverter in Oscillator Circuits
CMOS devices have a high input impedance, high gain, and high bandwidth. These characteristics are similar to ideal amplifier characteristics and, hence, a CMOS buffer or inverter can be used in an os | Doc
• Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and m | Doc
• Texas Instruments Little Logic Application Report
Portable and consumer electronic systems? needs present greater challenges today than ever before. Engineers strive to design smaller, faster, lower-cost systems to meet the market demand. Consequentl | Doc
• 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
TI?s 56-ball MicroStar Jr.E package, registered under JEDEC MO-225, has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance, improv | Doc
• Selecting the Right Level Translation Solution (Rev. A)
Supply voltages continue to migrate to lower nodes to support today's low-power, high-performance applications. While some devices are capable of running at lower supply nodes, others might not have t | Doc
• CMOS Power Consumption and CPD Calculation (Rev. B)
Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a res | Doc
Evaluation Kits
PP-SALB2-EVM: Smart Amplifier Speaker Characterization Board Evaluation Module
DLPLCR4500EVM: DLP? LightCrafter? 4500
TAS2560EVM: TAS2560 5.6W Class-D Audio Amplifier Evaluation Module
Spice Model
HSPICE Model for SN74LVC1G125 - ZIP (05/15/2007)
SN74LVC1G125 PSpice Model - ZIP (06/17/2016)


Features, Applications

Available in the Texas Instruments NanoStar and NanoFree Packages Supports 5-V VCC Operation Inputs Accept Voltages 5.5 V Max tpd 3.3 V Low Power Consumption, 10-A Max ICC 24-mA Output Drive 3.3 V Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 2000-V Human-Body Model 200-V Machine Model 1000-V Charged-Device Model (C101)

This bus buffer gate is designed for to 5.5-V VCC operation. The is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION

TA NanoStar WCSP (DSBGA) YEA to 85C NanoFree WCSP (DSBGA) YZA (Pb-free) SOT (SOT 23) DBV to 85C PACKAGE Reel of 3000 Reel of 3000 Reel of 3000 Reel of 250 Reel of 3000 SOT (SC-70) (SC 70) DCK Reel of 250 ORDERABLE PART NUMBER CM _ _CM_ SN74LVC1G125DCKT CM CM_ C25 C25_ TOP-SIDE MARKING

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar and NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, VCC. 6.5 V Input voltage range, VI (see Note 6.5 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 6.5 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and V to VCC 0.5 V Input clamp current, IIK (VI 50 mA Output clamp current, IOK (VO 50 mA Continuous output current, IO. 50 mA Continuous current through VCC or GND. 100 mA Package thermal impedance, JA (see Note 3): DBV package. 206C/W DCK package. 252C/W YEA/YZA package. 154C/W Storage temperature range, Tstg. to 150C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7.

MIN VCC Supply voltage Operating Data retention only VCC 1.95 V VCC 2.7 V VCC 3.6 V VCC 5.5 V VCC 1.95 V VCC 2.7 V VCC 3.6 V VCC V 0 VCC 1.65 V VCC 2.3 V IOH High-level output current VCC 3 V VCC 4.5 V VCC 1.65 V VCC 2.3 V IOL Low-level output current VCC 3 V VCC 4.5 V VCC 0.2 V t/v Input transition rise or fall rate VCC 0.3 V VCC 0.5 V VCC 0.35 VCC 5.5 VCC ns/V mA MAX 5.5 UNIT V

TA Operating free-air temperature 85 C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.


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