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Part: SN74LVCR32245AGKER
Category:
Logic
-> Transceivers
-> Standard Transceivers
Description: ti SN74LVCR32245A, 32-BIT Bus Transceiver With 3-STATE Outputs
Company: Texas Instruments, Inc.
Datasheet: Download SN74LVCR32245AGKER datasheet File size : 233 kB
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Datasheet text preview:
SCES428B - FEBRUARY 2003 - REVISED SEPTEMBER 2003
SN74LVCR32245A 32 BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS
D Member of the Texas Instruments D D D D D D
Widebus+ Family Operates From 1.65 V to 3.6 V Inputs Accept Voltages to 5.5 V Max tpd of 4.8 ns at 3.3 V Input and Output Ports Have Equivalent 26- Series Resistors, So No External Resistors Are Required Typical VOLP (Output Ground Bounce) 2 V at VCC = 3.3 V, TA = 25°C
D Ioff Supports Partial-Power-Down Mode D D D D
Operation Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC) Other Products to Consider: SN74LVC32245, SN74LVCH32245A Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101)
description/ordering information
This 32-bit (quad-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V VCC operation. The SN74LVC32245A is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as four 8-bit transceivers, two 16-bit transceivers, or one 32-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION
TA -40°C to 85°C PACKAGE LFBGA - GKE LFBGA - ZKE (Pb-free) Tape and reel ORDERABLE PART NUMBER SN74LVCR32245AGKER SN74LVCR32245AZKER ND245A TOP-SIDE MARKING
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus+ is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
SCES428B - FEBRUARY 2003 - REVISED SEPTEMBER 2003
SN74LVCR32245A 32 BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS
GKE OR ZKE PACKAGE (TOP VIEW) 1 A B C D E F G H J K L M N P R T 2 3 4 5 6
terminal assignments
1 A B C D E F G H J K L M N P R T 1B2 1B4 1B6 1B8 2B2 2B4 2B6 2B7 3B2 3B4 3B6 3B8 4B2 4B4 4B6 4B7 2 1B1 1B3 1B5 1B7 2B1 2B3 2B5 2B8 3B1 3B3 3B5 3B7 4B1 4B3 4B5 4B8 3 1DIR GND VCC GND GND VCC GND 2DIR 3DIR GND VCC GND GND VCC GND 4DIR 4 1OE GND VCC GND GND VCC GND 2OE 3OE GND VCC GND GND VCC GND 4OE 5 1A1 1A3 1A5 1A7 2A1 2A3 2A5 2A8 3A1 3A3 3A5 3A7 4A1 4A3 4A5 4A8 6 1A2 1A4 1A6 1A8 2A2 2A4 2A6 2A7 3A2 3A4 3A6 3A8 4A2 4A4 4A6 4A7
FUNCTION TABLE (each 8-bit section) INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SCES428B - FEBRUARY 2003 - REVISED SEPTEMBER 2003
SN74LVCR32245A 32 BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS
logic diagram (positive logic)
1DIR A3 2DIR A4 H3
1OE
H4
2OE
1A1
A5
2A1
E5
A2
1B1
E2
2B1
To Seven Other Channels
To Seven Other Channels
3DIR
J3
4DIR J4
T3
3OE
T4
4OE
3A1
J5
4A1
N5
J2
3B1
N2
4B1
To Seven Other Channels
To Seven Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 6.5 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, JA (see Note 3): GKE/ZKE package . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The value of VCC is provided in the recommended operating conditions table. 3. The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
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