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Details, datasheet, quote on part number:SNJ54AS652JT
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Datasheet text preview:
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066G DECEMBER 1983 REVISED DECEMBER 2000
D D D D D
Bus Transceivers/Registers Independent Registers and Enables for A and B Buses Multiplexed Real-Time and Stored Data Choice of True or Inverting Data Paths Choice of 3-State or Open-Collector Outputs to A Bus
DEVICE A OUTPUT 3-State B OUTPUT 3-State LOGIC Inverting
SN54ALS', SN54AS' . . . JT PACKAGE SN74ALS', SN74AS' . . . DW OR NT PACKAGE (TOP VIEW)
SN74ALS651A, 'AS651 SN54ALS652, SN74ALS652A, 'AS652 'ALS653 SN74ALS654
3-State Open Collector Open Collector
3-State 3-State 3-State
True Inverting True
CLKAB SAB OEAB A1 A2 A3 A4 A5 A6 A7 A8 GND
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VCC CLKBA SBA OEBA B1 B2 B3 B4 B5 B6 B7 B8
description
These devices consist of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the data bus or from the internal storage registers. Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB and SBA) inputs are provided to select real-time or stored data transfer. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input level selects real-time data, and a high input level selects stored data. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the octal bus transceivers and registers
SN54ALS', SN54AS' . . . FK PACKAGE (TOP VIEW)
OEAB SAB CLKAB NC VCC CLKBA SAB A1 A2 A3 NC A4 A5 A6
5 6 7 8 9 10 4 3 2 1 28 27 26 25 24 23 22 21 20 11 19 12 13 14 15 16 17 18
OEBA B1 B2 NC B3 B4 B5
NC No internal connection
Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions at the appropriate clock (CLKAB or CLKBA) terminals, regardless of the select- or output-control terminals. When SAB and SBA are in the real-time transfer mode, it is possible to store data without using the internal D-type flip-flops by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. The -1 versions of the SN74ALS651A and SN74ALS652A are identical to the standard versions except that the recommended maximum IOL for the -1 versions is increased to 48 mA. There are no -1 versions of the SN54ALS652, SN54ALS653, SN74ALS653, and SN74ALS654.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
A7 A8 GND NC B8 B7 B6
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SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066G DECEMBER 1983 REVISED DECEMBER 2000
ORDERING INFORMATION
TA PACKAGE ORDERABLE PART NUMBER SN74ALS651ANT SN74ALS652ANT PDIP NT NT Tube SN74ALS653NT SN74ALS654NT SN74AS651NT SN74AS652NT Tube Tape and reel 0°C to 70°C to 70°C Tube Tape and reel Tube SOIC DW DW Tape and reel Tube Tape and reel Tube Tape and reel Tube Tape and reel SN74ALS651ADW SN74ALS651ADWR SN74ALS652ADW SN74ALS652ADWR SN74ALS653DW SN74ALS653DWR SN74ALS654DW SN74ALS654DWR SN74AS651DW SN74AS651DWR SN74AS652DW SN74AS652DWR SNJ54ALS652JT CDIP JT JT 55°C to 125°C to 125°C LCCC FK FK Tube Tube SNJ54ALS653JT SNJ54AS651JT SNJ54AS652JT SNJ54ALS652FK SNJ54ALS653FK SNJ54AS651FK SNJ54AS652FK TOP-SIDE MARKING SN74ALS651ANT SN74ALS652ANT SN74ALS653NT SN74ALS654NT SN74AS651NT SN74AS652NT ALS651A ALS652A ALS653 ALS654 AS651 AS652 SNJ54ALS652JT SNJ54ALS653JT SNJ54AS651JT SNJ54AS652JT SNJ54ALS652FK SNJ54ALS653FK SNJ54AS651FK
SNJ54AS652FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066G DECEMBER 1983 REVISED DECEMBER 2000
BUS B
3 21 OEAB OEBA L L
1 23 2 CLKAB CLKBA SAB X X X
22 SBA L
3 21 OEAB OEBA H H
1 CLKAB X
23 CLKBA X
2 SAB L
BUS B 22 SBA X REAL-TIME TRANSFER BUS A TO BUS B 1 CLKAB H or L 23 CLKBA H or L 2 SAB H BUS B 22 SBA H TRANSFER STORED DATA TO A AND/OR B
BUS A
REAL-TIME TRANSFER BUS B TO BUS A
BUS B
BUS A
3 OEAB X L L
21 OEBA H X H
1 X
23 X
2 X X X
22 SBA X X X
3 OEAB H
CLKAB CLKBA SAB
OEBA L
STORAGE FROM A, B, OR A AND B Pin numbers shown are for the DW, JT, and NT packages.
Figure 1. Bus-Management Functions
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
BUS A 21
BUS A
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SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066G DECEMBER 1983 REVISED DECEMBER 2000
Function Tables
SN54ALS653, SN54AS651, SN74ALS651A, SN74ALS653, SN74AS651 DATA I/O CLKBA H or L H or L X H or L X X H or L SAB X X X X X X X X L H H SBA X X X X X X L H X X H A1 A8 Input Input Input Input Unspecified Output Output Output Input Input Output B1 B8 Input Input Unspecified Output Input Input Input Input Output Output Output
INPUTS OEAB L L X H L L L L H H H OEBA H H H H X L L L H H L CLKAB H or L H or L X X X H or L H or L
OPERATION OR FUNCTION OR FUNCTION Isolation Store A and B data Store A, hold B Store A in both registers Hold A, store B Store B in both registers Real-time B data to A bus Stored B data to A bus Real-time A data to B bus Stored A data to B bus Stored A data to B bus and stored B data to A bus
The data output functions can be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data input functions always are enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered to load both registers. SN54ALS652, SN54AS652, SN74ALS652A, SN74ALS654, SN74AS652 DATA I/O CLKBA H or L H or L X H or L X X H or L SAB X X X X X X X X L H H SBA X X X X X X L H X X H A1 A8 Input Input Input Input Unspecified Output Output Output Input Input Output B1 B8 Input Input Unspecified Output Input Input Input Input Output Output Output
INPUTS OEAB L L X H L L L L H H H OEBA H H H H X L L L H H L CLKAB H or L H or L X X X H or L H or L
OPERATION OR FUNCTION OR FUNCTION Isolation Store A and B data Store A, hold B Store A in both registers Hold A, store B Store B in both registers Real-time B data to A bus Stored B data to A bus Real-time A data to B bus Stored A data to B bus Stored A data to B bus and stored B data to A bus
The data output functions can be enabled or disabled by a variety of level combinations at OEAB or OEBA. Data input functions always are enabled; i.e., data at the bus terminals is stored on every low-to-high transition on the clock inputs. Select control = L: clocks can occur simultaneously. Select control = H: clocks must be staggered to load both registers.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54ALS652, SN54ALS653, SN54AS651, SN54AS652 SN74ALS651A, SN74ALS652A, SN74ALS653, SN74ALS654, SN74AS651, SN74AS652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS066G DECEMBER 1983 REVISED DECEMBER 2000
logic symbols
SN54AS651, SN74ALS651A, SN74AS651 OEBA OEAB CLKBA SBA CLKAB SAB 21 3 23 22 1 2 EN1 [BA] EN2 [AB] C4 G5 C6 G7 1 1 6D 1 A2 A3 A4 A5 A6 A7 A8 5 6 7 8 9 10 11 7 7 19 18 17 16 15 14 13 B2 B3 B4 B5 B6 B7 B8 A2 A3 A4 A5 A6 A7 A8 5 6 7 8 9 10 11 5 51 1 2 4D 20 B1 A1 OEBA OEAB CLKBA SBA CLKAB SAB 21 3 23 22 1 2 SN54ALS652, SN54AS652, SN74ALS652A, SN74AS652 EN1 [BA] EN2 [AB] C4 G5 C6 G7 1 1 6D 1 7 7 19 18 17 16 15 14 13 B2 B3 B4 B5 B6 B7 B8 5 51 1 2 4D 20 B1
A1
4
4
SN54ALS653, SN74ALS653 OEBA OEAB CLKBA SBA CLKAB SAB 21 3 23 22 1 2 EN1 [BA] EN2 [AB] C4 G5 C6 G7 1 1 6D 1 A2 A3 A4 A5 A6 A7 A8 5 6 7 8 9 10 11 7 7 19 18 17 16 15 14 13 B2 B3 B4 B5 B6 B7 B8 A2 A3 A4 A5 A6 A7 A8 5 6 7 8 9 10 11 5 51 1 2 4D 20 B1 A1 OEBA OEAB CLKBA SBA CLKAB SAB 21 3 23 22 1 2
SN74ALS654 EN1 [BA] EN2 [AB] C4 G5 C6 G7 1 1 6D 1 7 7 19 18 17 16 15 14 13 B2 B3 B4 B5 B6 B7 B8 5 51 1 2 4D 20 B1
A1
4
4
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the DW, JT, and NT packages.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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