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Part: SNJ54AS756W
Category:
Logic
-> Buffers/Drivers
-> Inverting Buffers and Drivers
Description: ti SN54AS756, Octal Buffers & Line Drivers With Open-collector Outputs
Company: Texas Instruments, Inc.
Datasheet: Download SNJ54AS756W datasheet File size : 214 kB
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SN54AS756, SN74AS756, SN74AS757 OCTAL BUFFERS AND LINE DRIVERS WITH OPEN-COLLECTOR OUTPUTS
SDAS040B DECEMBER 1983 REVISED JANUARY 1995
· · · · ·
Open-Collector Outputs Drive Bus Lines or Buffer Memory Address Registers Eliminate the Need for 3-State Overlap Protection pnp Inputs Reduce dc Loading Open-Collector Versions of AS240A and AS241 Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs
SN54AS756 . . . J PACKAGE SN74AS756, SN74AS757 . . . DW OR N PACKAGE (TOP VIEW)
description
These octal buffers and line drivers are designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters by eliminating the need for 3-state overlap protection. The designer has a choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs. These devices feature high fan-out and improved fan-in. The SN54AS756 is characterized for operation over the full military temperature range of 55°C to 125°C. The SN74AS756 and SN74AS757 are characterized for operation from 0°C to 70°C.
1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
VC C 2OE / 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1
SN54AS756 . . . FK PACKAGE (TOP VIEW)
2Y4 1A1 1OE VCC
1A2 2Y3 1A3 2Y2 1A4
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
2OE 1Y1 2A4 1Y2 2A3 1Y3
2OE for AS756 or 2OE for SN74AS757
logic symbols
AS756 1OE 1 EN 18 16 14 12 1OE 1 SN74AS757 EN 18 16 14 12
1A1 1A2 1A3 1A4
2 4 6 8
1Y1 1Y2 1Y3 1Y4
1A1 1A2 1A3 1A4
2 4 6 8
2Y1 GND 2A1 1Y4 2A2
1Y1 1Y2 1Y3 1Y4
2OE
19
EN 9 7 5 3
2OE
19
EN 9 7 5 3
2A1 2A2 2A3 2A4
11 13 15 17
2Y1 2Y2 2Y3 2Y4
2A1 2A2 2A3 2A4
11 13 15 17
2Y1 2Y2 2Y3 2Y4
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1995, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
SN54AS756, SN74AS756, SN74AS757 OCTAL BUFFERS AND LINE DRIVERS WITH OPEN-COLLECTOR OUTPUTS
SDAS040B DECEMBER 1983 REVISED JANUARY 1995
logic diagrams (positive logic)
AS756 1OE 1 1OE 1 SN74AS757
1A1
2
18
1Y1
1A1
2
18
1Y1
1A2
4
16
1Y2
1A2
4
16
1Y2
1A3
6
14
1Y3
1A3
6
14
1Y3
1A4
8
12
1Y4
1A4
8
12
1Y4
2OE
19
2OE
19
2A1
11
9
2Y1
2A1
11
9
2Y1
2A2
13
7
2Y2
2A2
13
7
2Y2
2A3
15
5
2Y3
2A3
15
5
2Y3
2A4
17
3
2Y4
2A4
17
3
2Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54AS756 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C SN74AS756, SN74AS757 . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54AS756, SN74AS756, SN74AS757 OCTAL BUFFERS AND LINE DRIVERS WITH OPEN-COLLECTOR OUTPUTS
SDAS040B DECEMBER 1983 REVISED JANUARY 1995
recommended operating conditions
SN54AS756 MIN VCC VIH VIL VOH IOL TA Supply voltage High-level input voltage Low-level input voltage High-level output voltage Low-level output current Operating free-air temperature 55 4.5 2 0.7 5.5 48 125 0 NOM 5 MAX 5.5 SN74AS756 SN74AS757 MIN 4.5 2 0.8 5.5 64 70 NOM 5 MAX 5.5 V V V V mA °C UNIT
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER VIK IOH VOL II IIH IIL A inputs of SN74AS757 only All other inputs AS756 ICC SN74AS757 VCC = 5 5 V 5.5 VCC = 5 5 V 5.5 Outputs high Outputs low Outputs high Outputs low 9 51 21 61 TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, VCC = 4 5 V 4.5 VCC = 5.5 V, VCC = 5.5 V, VCC = 5.5 V, , II = 18 mA VOH = 5.5 V IOL = 48 mA IOL = 64 mA VI = 7 V VI = 2.7 V VI = 0.4 V SN54AS756 MIN TYP MAX 1.2 0.1 0.55 0.55 0.1 20 1 0.5 15 80 33 95 9 51 21 61 0.1 20 1 0.5 15 80 33 95 mA SN74AS756 SN74AS757 MIN TYP MAX 1.2 0.1 V mA V mA µA mA UNIT
All typical values are at VCC = 5 V, TA = 25°C.
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
SN54AS756, SN74AS756, SN74AS757 OCTAL BUFFERS AND LINE DRIVERS WITH OPEN-COLLECTOR OUTPUTS
SDAS040B DECEMBER 1983 REVISED JANUARY 1995
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 , TA = MIN to MAX SN54AS756 SN74AS756 MIN tPLH tPHL tPLH tPHL A OE 3 Y Y 1 3 1 MAX 20 7 22 8.5 MIN 3 1 3 1 MAX 19 6 19.5 7.5 ns ns
PARAMETER
FROM (INPUT)
TO (OUTPUT)
UNIT
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
switching characteristics (see Figure 1)
VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 , TA = MIN to MAX SN74AS757 MIN tPLH tPHL tPLH tPHL tPLH tPHL A 3 Y 1Y 2Y 1 3 1OE 2OE 1 3 1 MAX 18.5 6 20 7 21 7.5 ns ns ns
PARAMETER
FROM (INPUT)
TO (OUTPUT)
UNIT
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
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POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
SN54AS756, SN74AS756, SN74AS757 OCTAL BUFFERS AND LINE DRIVERS WITH OPEN-COLLECTOR OUTPUTS
SDAS040B DECEMBER 1983 REVISED JANUARY 1995
PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V VCC S1 RL From Output Under Test CL (see Note A) RL Test Point R1 From Output Under Test CL (see Note A) Test Point From Output Under Test CL (see Note A) R2 Test Point RL = R1 = R2
LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR 3-STATE OUTPUTS
Timing Input tsu Data Input 1.3 V
3.5 V 1.3 V 0.3 V th 3.5 V 1.3 V 0.3 V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES
High-Level Pulse
3.5 V 1.3 V tw 1.3 V 0.3 V
Low-Level Pulse
3.5 V 1.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS PULSE DURATIONS
Output Control (low-level enabling) tPZL Waveform 1 S1 Closed (see Note B)
3.5 V 1.3 V 1.3 V 0.3 V tPLZ 1.3 V VOL 0.3 V VOH 1.3 V 0.3 V 3.5 V Input tPLH In-Phase Output 1.3 V 1.3 V 1.3 V 0.3 V tPHL VOH 1.3 V VOL tPLH VOH 1.3 V VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.3 V VOL
[3.5 V
tPHZ tPZH Waveform 2 S1 Open (see Note B)
tPHL Out-of-Phase Output (see Note C)
[0 V
VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
5
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