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Part: TM497BBK32S-70
Category: Memory -> DRAM -> SDR SDRAM -> Modules
Description: ti TM497BBK32S, 4 194 304 BY 32-Bit Dynamic RAM Module
Company: Texas Instruments, Inc.
Datasheet: Download TM497BBK32S-70 datasheet File size : 199 kB
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Datasheet text preview:
TM497BBK32, TM497BBK32S 4 194 304 BY 32-BIT DYNAMIC RAM MODULE
SMMS433B JANUARY 1993 REVISED JUNE 1995
D D D D D D D D D
Organization . . . 4 194 304 × 32 Single 5-V Power Supply (±10% Tolerance) 72-Pin Single-In-Line Memory Module (SIMM) for Use With Sockets Utilizes Eight 16-Megabit DRAMs in Plastic Small-Outline J-Lead (SOJ) Packages Long Refresh Period 32 ms (2048 Cycles) All Inputs, Outputs, Clocks Fully TTL Compatible 3-State Output Common CAS Control for Eight Common Data-In and Data-Out Lines in Four Blocks Enhanced Page Mode Operation With CAS-Before-RAS ( CBR ), RAS-Only, and Hidden Refresh
D D
Presence Detect Performance Ranges:
ACCESS ACCESS ACCESS READ OR TIME TIME TIME WRITE tRAC tAA tCAC CYCLE (MAX) (MAX) (MAX) (MIN) '497BBK32-60 60 ns 30 ns 15 ns 110 ns '497BBK32-70 70 ns 35 ns 18 ns 130 ns '497BBK32-80 80 ns 40 ns 20 ns 150 ns
D D D D
Low Power Dissipation Operating Free-Air-Temperature Range 0°C to 70°C Gold-Tabbed Version Available: TM497BBK32 Tin-Lead (Solder) Tabbed Version Available: TM497BBK32S
description
The TM497BBK32 is a 16M-byte dynamic random-access memory (DRAM) organized as four times 4 194 304 × 8 in a 72-pin leadless single-in-line memory module (SIMM). The SIMM is composed of eight TMS417400DJ, 4 194 304 × 4-bit DRAMs, each in 24/26-lead plastic small-outline J-lead (SOJ) packages mounted on a substrate with decoupling capacitors. The TMS417400DJ is described in the TMS417400 data sheet. The TM497BBK32 SIMM is available in the single-sided BK leadless module for use with sockets. The TM497BBK32 SIMM features RAS access times of 60 ns, 70 ns, and 80 ns. This device is characterized for operation from 0°C to 70°C.
operation
The TM497BBK32 operates as eight TMS417400DJs connected as shown in the functional block diagram and Table 1. The common I/O feature dictates the use of early write cycles to prevent contention on D and Q. refresh The refresh period is extended to 32 ms and, during this period, each of the 2048 rows must be strobed with RAS in order to retain data. CAS can remain high during the refresh sequence to conserve power. power up To achieve proper operation, an initial pause of 200 µs followed by a minimum of eight initialization cycles is required after full VCC level is achieved. These eight initialization cycles need to include at least one refresh (RAS-only or CBR ) cycle.
Part numbers in this data sheet are for the gold-tabbed version; the information applies to both gold-tabbed and solder-tabbed versions.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1995, Texas Instruments Incorporated
POST OFFICE BOX 1443
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TM497BBK32, TM497BBK32S 4 194 304 BY 32-BIT DYNAMIC RAM MODULE
SMMS433B JANUARY 1993 REVISED JUNE 1995
BK SINGLE-IN-LINE PACKAGE ( TOP VIEW )
(SIDE VIEW )
VSS DQ0 DQ16 DQ1 DQ17 DQ2 DQ18 DQ3 DQ19 VC C NC A0 A1 A2 A3 A4 A5 A6 A10 DQ4 DQ20 DQ5 DQ21 DQ6 DQ22 DQ7 DQ23 A7 NC VC C A8 A9 NC RAS2 NC NC NC NC VSS CAS0 CAS2 CAS3 CAS1 RAS0 NC NC W NC DQ8 DQ24 DQ9 DQ25 DQ10 DQ26 DQ11 DQ27 DQ12 DQ28 VC C DQ29 DQ13 DQ30 DQ14 DQ31 DQ15 NC PD1 PD2 PD3 PD4 NC VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
PIN NOMENCLATURE A0 A10 CAS0 CAS3 DQ0 DQ31 NC PD1 PD4 RAS0, RAS2 VCC VSS W Address Inputs Column-Address Strobe Data In / Data Out No Connection Presence Detects Row-Address Strobe 5-V Supply Ground Write Enable
PRESENCE DETECT SIGNAL (PIN) 80 ns TM497BBK32 70 ns 60 ns PD1 (67) VSS VSS VSS PD2 (68) NC NC NC PD3 (69) NC VSS NC PD4 (70) VSS NC NC
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POST OFFICE BOX 1443
· HOUSTON, TEXAS 772511443
TM497BBK32, TM497BBK32S 4 194 304 BY 32-BIT DYNAMIC RAM MODULE
SMMS433B JANUARY 1993 REVISED JUNE 1995
Table 1. Connection Table
DATA BLOCK DQ0 DQ7 DQ8 DQ15 DQ16 DQ23 DQ24 DQ31 RASx RAS0 RAS0 RAS2 RAS2 CASx CAS0 CAS1 CAS2 CAS3
single-in-line memory module and components
PC substrate: 1,27 ± 0,1 mm (0.05 inch) nominal thickness; 0.005 inch/inch maximum warpage Bypass capacitors: Multilayer ceramic Contact area for TM497BBK32: Nickel plate and gold plate over copper Contact area for TM497BBK32S: Nickel plate and tin-lead over copper
POST OFFICE BOX 1443
· HOUSTON, TEXAS 772511443
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