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Part: TM497FBK32S-60
Category:
Memory
-> DRAM
-> SDR SDRAM
-> Modules
Description: ti TM497FBK32S, 4 194 304 BY 32-Bit Extended Data Out DRAM Modules
Company: Texas Instruments, Inc.
Datasheet: Download TM497FBK32S-60 datasheet File size : 199 kB
Request For quote: Find where to buy TM497FBK32S-60
Datasheet text preview:
TM497FBK32, TM497FBK32S 4194304 BY 32-BIT TM893GBK32, TM893GBK32S 8388608 BY 32-BIT EXTENDED DATA OUT DYNAMIC RAM MODULES
SMMS668 NOVEMBER 1996
D D D D D D D D D D
Organization TM497FBK32/S: 4 194 304 x 32 TM893GBK32/S: 8 388 608 x 32 Single 5-V Power Supply (±10% Tolerance) 72-Pin Single-In-Line Memory Module (SIMM) for Use With Sockets TM497FBK32/S Uses Eight 16M-Bit Dynamic Random-Access Memories (DRAMs) in Plastic Small-Outline J-Lead (SOJ) Packages TM893GBK32/S Uses Sixteen 16M-Bit DRAMs in Plastic SOJ Packages Long Refresh Period 32 ms (2 048 Cycles) All Inputs, Outputs, Clocks Fully TTL-Compatible 3-State Output Common CAS Control for Eight Common Data-In and Data-Out Lines in Four Blocks Extended Data Out (EDO) Operation With CAS-Before-RAS ( CBR ), RAS-Only, and Hidden Refresh
D D
Presence Detect Performance Ranges:
ACCESS ACCESS ACCESS TIME TIME TIME tRAC tAA tCAC (MAX) (MAX) (MAX) '497FBK32/S-60 60 ns 30 ns 15 ns '497FBK32/S-70 70 ns 35 ns 18 ns '497FBK32/S-80 80 ns 40 ns 20 ns '893GBK32/S-60 60 ns '893GBK32/S-70 70 ns '893GBK32/S-80 80 ns 30 ns 35 ns 40 ns 15 ns 18 ns 20 ns EDO CYCLE tHPC (MIN) 25 ns 30 ns 35 ns 25 ns 30 ns 35 ns
D D D D
Low Power Dissipation Operating Free-Air Temperature Range 0°C to 70°C Gold-Tabbed Version Available: TM497FBK32, TM893GBK32 Tin-Lead (Solder-) Tabbed Version Available: TM497FBK32S, TM893GBK32S
description
The TM497FBK32 is a 16M-byte dynamic random-access memory (DRAM) organized as four times 4 194 304 × 8 bits in a 72-pin leadless single-in-line memory module (SIMM). The SIMM is composed of eight TMS417409DJ, 4 194 304 × 4-bit DRAMs, each in 24/26-lead plastic small-outline J-lead (SOJ) packages mounted on a substrate with decoupling capacitors. The TMS417409DJ is described in the TMS416409, TMS417409 data sheet (literature number SMKS884). The TM497FBK32 SIMM is available in the single-sided BK leadless module for use with sockets. The TM497FBK32 features RAS access times of 60 ns, 70 ns, and 80 ns. This device is characterized for operation from 0°C to 70°C. The TM893GBK32/S is a 32M-byte DRAM organized as four times 8 388 608 × 8 bits in a 72-pin leadless SIMM. The SIMM is composed of sixteen TMS417409DJ 4 194 304 × 4-bit DRAMs. The TM893GBK32/S SIMM is available in the double-sided BK leadless module for use with sockets. The TM893GBK32/S features RAS access times of 60 ns, 70 ns, and 80 ns. This device is characterized for operation from 0°C to 70°C.
operation
The TM497FBK32/S operates as eight TMS417409DJs connected as shown in Figure 1 and in Table 1. The common I/O feature dictates the use of early write cycles to prevent contention on D and Q. The TM893GBK32/S operates as sixteen TMS417409DJs connected as shown in Figure 2 and in Table 2. The common I/O feature dictates the use of early write cycles to prevent contention on D and Q.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Part numbers in this data sheet are for the gold-tabbed version; the information applies to both gold-tabbed and solder-tabbed versions.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1996, Texas Instruments Incorporated
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TM497FBK32, TM497FBK32S 4194304 BY 32-BIT TM893GBK32, TM893GBK32S 8388608 BY 32-BIT EXTENDED DATA OUT DYNAMIC RAM MODULES
SMMS668 NOVEMBER 1996
refresh The refresh period is extended to 32 ms and, during this period, each of the 2 048 rows must be strobed with RAS in order to retain data. CAS can remain high during the refresh sequence to conserve power. power up To achieve proper operation, an initial pause of 200 µs followed by a minimum of eight initialization cycles is required after full VCC level is achieved. These eight initialization cycles need to include at least one refresh (RAS-only or CBR ) cycle.
2
POST OFFICE BOX 1443
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TM497FBK32, TM497FBK32S 4194304 BY 32-BIT TM893GBK32, TM893GBK32S 8388608 BY 32-BIT EXTENDED DATA OUT DYNAMIC RAM MODULES
SMMS668 NOVEMBER 1996
BK SINGLE-IN-LINE PACKAGE ( TOP VIEW )
TM497FBK32/S ( SIDE VIEW )
TM893GBK32/S ( SIDE VIEW )
VSS DQ0 DQ16 DQ1 DQ17 DQ2 DQ18 DQ3 DQ19 VC C NC A0 A1 A2 A3 A4 A5 A6 A10 DQ4 DQ20 DQ5 DQ21 DQ6 DQ22 DQ7 DQ23 A7 NC VC C A8 A9 NC RAS2 NC NC NC NC VSS CAS0 CAS2 CAS3 CAS1 RAS0 NC NC W NC DQ8 DQ24 DQ9 DQ25 DQ10 DQ26 DQ11 DQ27 DQ12 DQ28 VC C DQ29 DQ13 DQ30 DQ14 DQ31 DQ15 NC PD1 PD2 PD3 PD4 NC VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72
PIN NOMENCLATURE A0 A10 CAS0 CAS3 DQ0 DQ31 NC PD1 PD4 RAS0 RAS3 VCC VSS W Address Inputs Column-Address Strobe Data In / Data Out No Connection Presence Detects Row-Address Strobe 5-V Supply Ground Write Enable
PRESENCE DETECT SIGNAL (PIN) 80 ns TM497FBK32/S 70 ns 60 ns 80 ns TM893GBK32/S 70 ns 60 ns PD1 (67) VSS VSS VSS NC NC NC PD2 (68) NC NC NC VSS VSS VSS PD3 (69) NC VSS NC NC VSS NC PD4 (70) VSS NC NC VSS NC NC
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Others parts begin by tm
TM-1 TM-2 TM-3 TM-4 TM-5 TM-6 TM-7 TM-8 TM-9 TM-10 TM-11 TM-12 TM-13 TM-14 TM-15 TM-16 TM-17 TM-18 TM-19 TM-20 TM-21 TM-22 TM-23 TM-24 TM-25 TM-26 TM-27 TM-28 TM-29 TM-30
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