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Part: TM4EP72BPN
Category:
Memory
-> DRAM
-> EDO/FPM DRAM
-> Modules
-> 32 MB
-> EDO
Description: 4,194,304 BY 64-bit Edo DRAM Module (dimm)
Company: Texas Instruments, Inc.
Datasheet: Download TM4EP72BPN datasheet File size : 199 kB
Request For quote: Find where to buy TM4EP72BPN
Datasheet text preview:
TM4EP64BJN, TM4EP64BPN, TM4EP64CJN, TM4EP64CPN 4194304 BY 64-BIT TM4EP72BJN, TM4EP72BPN, TM4EP72CJN, TM4EP72CPN 4194304 BY 72-BIT EXTENDED-DATA-OUT DYNAMIC RAM MODULES
SMMS682A AUGUST 1997 REVISED MARCH 1998
D D D D D D D
Organization TM4EP64xxN-xx . . . 4 194 304 × 64 Bits TM4EP72xxN-xx . . . 4 194 304 × 72 Bits Single 3.3-V Power Supply (±10% Tolerance) JEDEC 168-Pin Dual-In-Line Memory Module (DIMM) Without Buffer for Use With Socket TM4EP64xxN-xx -- Utilizes Sixteen 16M-Bit High-Speed (4M × 4-Bit) Dynamic RAMs TM4EP72xxN-xx -- Utilizes Eighteen 16M-Bit High-Speed (4M × 4-Bit) Dynamic RAMs High-Speed, Low-Noise LVTTL Interface High-Reliability Plastic 24/26-Lead 300-Mil-Wide Surface-Mount Small-Outline J-Lead (SOJ) Package (DJ Suffix) and 24/26-Lead 300-Mil-Wide Surface-Mount Thin Small-Outline Package (TSOP) (DGA Suffix)
D D D D D D D
Long Refresh Periods: TM4EPxxCxN: 64 ms (4 096 Cycles) TM4EPxxBxN: 32 ms (2 048 Cycles) 3-State Output Extended-Data-Out (EDO) Operation With CAS-Before-RAS (CBR), RAS-Only, and Hidden Refresh Serial Presence-Detect (SPD) Using EEPROM Ambient Temperature Range 0°C to 70°C Gold-Plated Contacts Performance Ranges
ACCESS TIME tR A C (MAX) 50 ns 60 ns 70 ns ACCESS ACCESS TIME TIME tC A C tA A (MAX) (MAX) 13 ns 25 ns 15 ns 30 ns 18 ns 35 ns EDO CYCLE tHPC (MIN) 20 ns 25 ns 30 ns
'4EPxxxxN-50 '4EPxxxxN-60 '4EPxxxxN-70
description
The TM4EP64xxN is a 32M-byte, 168-pin, dual-in-line memory module (DIMM). The DIMM is composed of sixteen TMS42x409A, 4 194 304 × 4-bit EDO dynamic random-access memories (DRAMs), each in a 300-mil, 26-pin plastic thin small-outline package (TSOP) (DGA suffix) mounted on a substrate with decoupling capacitors. See the TMS42x409A data sheet (literature number SMKS893). The TM4EP64xJN is available with an SOJ package (DJ suffix). The TM4EP72xxN is a 32M-byte, 168-pin DIMM. The DIMM is composed of eighteen TMS42x409A, 4 194 304 × 4-bit EDO DRAMs, each in a 300-mil, 26-pin plastic TSOP (DGA suffix) mounted on a substrate with decoupling capacitors. See the TMS42x409A data sheet (literature number SMKS893). The TM4EP72xJN is available with an SOJ packaage (DJ suffix).
operation
The TM4EP64xxN operates as 16 TMS42x409As that are connected as shown in the TM4EP64xxN functional block diagram. The TM4EP72xxN operates as 18 TMS42x409As that are connected as shown in the TM4EP72xxN functional block diagram.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 1443
· HOUSTON, TEXAS 772511443
1
TM4EP64BJN, TM4EP64BPN, TM4EP64CJN, TM4EP64CPN 4194304 BY 64-BIT TM4EP72BJN, TM4EP72BPN, TM4EP72CJN, TM4EP72CPN 4194304 BY 72-BIT EXTENDED-DATA-OUT DYNAMIC RAM MODULES
SMMS682A AUGUST 1997 REVISED MARCH 1998
DUAL-IN-LINE MEMORY MODULE ( TOP VIEW )
TM4EP64xxN ( SIDE VIEW )
TM4EP72xxN ( SIDE VIEW )
PIN NOMENCLATURE TM4EPxxBxN A[0:10] A[0:10] DQ[0:63] CB[0:7] CAS[0:7] RAS0 and RAS2 WE0 and WE2 OE0 and OE2 SA[0:2] SDA SCL NC VDD VSS Row-Address Inputs Column-Address Inputs Data In / Data Out Check Bit In / Check Bit Out Column-Address Strobe Row-Address Strobe Write Enable Output Enable Serial Presence Detect (SPD) Device Add Input SPD Address / Data SPD Clock No Connect 3.3-V Supply Ground
1
10 11
PIN NOMENCLATURE TM4EPxxCxN A[0:11] A[0:9] DQ[0:63] CB[0:7] CAS[0:7] RAS0 and RAS2 WE0 and WE2 OE0 and OE2 SA[0:2] SDA SCL NC VDD VSS Row-Address Inputs Column-Address Inputs Data In / Data Out Check Bit In / Check Bit Out Column-Address Strobe Row-Address Strobe Write Enable Output Enable Serial Presence Detect (SPD) Device Add Input SPD Address / Data SPD Clock No Connect 3.3-V Supply Ground
40
41
84
2
POST OFFICE BOX 1443
· HOUSTON, TEXAS 772511443
TM4EP64BJN, TM4EP64BPN, TM4EP64CJN, TM4EP64CPN 4194304 BY 64-BIT TM4EP72BJN, TM4EP72BPN, TM4EP72CJN, TM4EP72CPN 4194304 BY 72-BIT EXTENDED-DATA-OUT DYNAMIC RAM MODULES
SMMS682A AUGUST 1997 REVISED MARCH 1998
Pin Assignments
PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 NAME VSS DQ0 DQ1 DQ2 DQ3 VDD DQ4 DQ5 DQ6 DQ7 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VDD DQ14 DQ15 CB0 CB1 VSS NC NC VDD WE0 CAS0 CAS1 RAS0 OE0 VSS A0 A2 A4 A6 A8 A10 NC VDD NC NC NO. 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 PIN NAME VSS OE2 RAS2 CAS2 CAS3 WE2 VDD NC NC CB2 CB3 VSS DQ16 DQ17 DQ18 DQ19 VDD DQ20 NC NC NC VSS DQ21 DQ22 DQ23 VSS DQ24 DQ25 DQ26 DQ27 VDD DQ28 DQ29 DQ30 DQ31 VSS NC NC NC SDA SCL VDD NO. 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 PIN NAME VSS DQ32 DQ33 DQ34 DQ35 VDD DQ36 DQ37 DQ38 DQ39 DQ40 VSS DQ41 DQ42 DQ43 DQ44 DQ45 VDD DQ46 DQ47 CB4 CB5 VSS NC NC VDD NC CAS4 CAS5 NC NC VSS A1 A3 A5 A7 A9 A11 NC VDD NC NC NO. 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 PIN NAME VSS NC NC CAS6 CAS7 NC VDD NC NC CB6 CB7 VSS DQ48 DQ49 DQ50 DQ51 VDD DQ52 NC NC NC VSS DQ53 DQ54 DQ55 VSS DQ56 DQ57 DQ58 DQ59 VDD DQ60 DQ61 DQ62 DQ63 VSS NC NC SA0 SA1 SA2 VDD
POST OFFICE BOX 1443
· HOUSTON, TEXAS 772511443
3
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