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Details, datasheet, quote on part number:TP3054B
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| Part: | TP3054B |
| Category: | Communication => Telephony => Codecs/Voice Codecs => PCM Line Card->Codec |
| Description: | Monolithic Serial Interface Combined PCM Codec And Filter |
| Company: | Texas Instruments, Inc. |
| Datasheet: | Download TP3054B datasheet File size : 254 kB |
| Request For quote: | Find where to buy TP3054B
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Datasheet text preview:
TP3054B, TP3057B, TP13054B, TP13057B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER
SCTS042A MAY 1990 REVISED JULY 1996
D
Complete PCM Codec and Filtering Systems Includes: Transmit High-Pass and Low-Pass Filtering Receive Low-Pass Filter With (sin x)/x Correction Active RC Noise Filters µ-Law or A-Law Compatible Coder and Decoder Internal Precision Voltage Reference Serial I/O Interface Internal Autozero Circuitry
D D D D D D D D D
µ-Law TP3054B and TP13054B A-Law TP3057B and TP13057B ± 5-V Operation Low Operating Power . . . 50 mW Typ Power-Down Standby Mode . . . 3 mW Typ Automatic Power Down TTL- or CMOS-Compatible Digital Interface Maximizes Line Interface Card Circuit Density Improved Versions of National Semiconductor TP3054, TP3057, TP3054-X, TP3057-X
DW OR N PACKAGE (TOP VIEW)
description
The TP3054B, TP3057B, TP13054B, and TP13057B are comprised of a single-chip PCM codec (pulse-code-modulated encoder and decoder) and PCM line filter. These devices provide all the functions required to interface a full-duplex (2-wire) voice telephone circuit with a TDM (time-division-multiplexed) system. These devices are pin-for-pin compatible with the National Semiconductor TP3054B and TP3057B, respectively. Primary applications include:
· · · · ·
VBB ANLG GND VFRO V CC FSR DR BCLKR/CLKSEL MCLKR/PDN
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VFXI + VFXI GSX TSX FSX DX BCLKX MCLKX
Line interface for digital transmission and switching of T1 carrier, PABX, and central office telephone systems Subscriber line concentrators Digital-encryption systems Digital voice-band data-storage systems Digital signal processing
These devices are designed to perform the transmit encoding (A/D conversion) and receive decoding (D/A conversion) as well as the transmit and receive filtering functions in a PCM system. They are intended to be used at the analog termination of a PCM line or trunk. The devices require two transmit and receive master clocks that may be asynchronous (1.536 MHz, 1.544 MHz, or 2.048 MHz), transmit and receive data clocks that are synchronous with the master clock (but can vary from 64 kHz to 2.048 MHz), and transmit and receive frame-sync pulses. The TP3054B, TP3057B, TP13054B, and TP13057B provide the band-pass filtering of the analog signals prior to encoding and after decoding of voice and call progress tones. The TP3054B and TP13054B contain patented circuitry to achieve low transmit channel idle noise and are not recommended for applications in which the composite signals on the transmit side are below 55 dBm0. The TP3054B and TP3057B are characterized for operation from 0°C to 70°C. The TP13054B and TP13057B are characterized for operation from 40°C to 85°C.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the CMOS gates.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 1996, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
TP3054B, TP3057B, TP13054B, TP13057B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER
SCTS042A MAY 1990 REVISED JULY 1996
functional block diagram
14 R2 Analog Input VFXI VFXI + 15 16 R1 + RC Active Filter SwitchedCapacitor Band-Pass Filter S/H DAC Autozero Logic GSX
Voltage Reference Comparator
A/D Control Logic
Transmit Regulator OE
11
DX
3 VFRO Power Amplifier
RC Active Filter
SwitchedCapacitor Low-Pass Filter
S/H DAC
Receive Regulator CLK
6
DR
Timing and Control 5V 4 VCC 1 VBB 5 V 9 2 ANLG GND MCLKX MCLKR/ PDN BCLKX BCLKR/ FSR FSX CLKSEL 8 10 7 5 12
13 TSX
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
TP3054B, TP3057B, TP13054B, TP13057B MONOLITHIC SERIAL INTERFACE COMBINED PCM CODEC AND FILTER
SCTS042A MAY 1990 REVISED JULY 1996
Terminal Functions
TERMINAL NAME ANLG GND BCLKR/CLKSEL NO. 2 7 DESCRIPTION Analog ground. All signals are referenced to ANLG GND. The bit clock that shifts data into DR after the FSR leading edge. May vary from 64 kHz to 2.048 MHz. Alternately, BCLKR/CLKSEL can be a logic input that selects either 1.536 MHz/1.544 MHz or 2.048 MHz for the master clock in the synchronous mode. BCLKX is used for both transmit and receive directions (see Table 1). The bit clock that shifts out the PCM data on DX. BCLKX can vary from 64 kHz to 2.048 MHz, but must be synchronous with MCLKX. Receive data input. PCM data is shifted into DR following the FSR leading edge. The 3-state PCM data output that in enabled by FSX Receive frame-sync pulse input that enables BCLKR to shift PCM data in DR. FSR is an 8-kHz pulse train (see Figures 1 and 2 for timing details). Transmit frame-sync pulse that enables BCLKX to shift out the PCM data on DX. FSX is an 8-kHz pulse train (see Figures 1 and 2 for timing details). Analog output of the transmit input amplifier. GSX is used to externally set gain. Receive master clock (must be 1.536 MHz, 1.544 MHz, or 2.048 MHz). May be synchronous with MCLKX, but should be synchronous with MCLKX for best performance. When MCLKR is connected continuously low, MCLKX is selected for all internal timing. When MCLKR is connected continuously high, the device is powered down. Transmit master clock (must be 1.536 MHz, 1.544 MHz, or 2.048 MHz). May be asynchronous with MCLKR. Open-drain output that pulses low during the encoder time slot Negative power supply pin. VBB = 5 V ± 5% Positive power supply pin. VCC = 5 V ± 5% Analog output of the receive filter Noninverting input of the transmit input amplifier Inverting input of the transmit input amplifier
BCLKX DR DX FSR FSX GSX MCLKR/PDN
10 6 11 5 12 14 8
MCLKX TSX VBB VCC VFRO VFXI + VFXI
9 13 1 4 3 16 15
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
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