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Part: TPS79301DBVR
Category:
Power Management
-> Regulators
-> Linear Regulators
-> LDO (Low Drop Out)
Description: ti TPS79301, Ultra Low Noise, High Psrr, Fast RF, High-Enable, 200mA Low Dropout Regulator
Company: Texas Instruments, Inc.
Datasheet: Download TPS79301DBVR datasheet File size : 394 kB
Request For quote: Find where to buy TPS79301DBVR
Datasheet text preview:
DBV 5
DBV 6
YEQ
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TPS79301, TPS79318, TPS79325 TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348F JULY 2001 REVISED SEPTEMBER 2003
ULTRALOW-NOISE, HIGH PSRR, FAST RF 200-mA LOW-DROPOUT LINEAR REGULATORS IN NANOSTARTM WAFER CHIP SCALE AND SOT23
FEATURES
· · · · · · · · · 200-mA RF Low-Dropout Regulator With Enable Available in 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3-V, 3.3-V, 4.75-V, and Adj (1.22 V to 5.5 V) High PSRR (70 dB at 10 kHz) Ultralow Noise (32 µV) Fast Start-Up Time (50 µs) Stable With a 2.2-µF Ceramic Capacitor Excellent Load/Line Transient Response Very Low Dropout Voltage (112 mV at Full Load, TPS79330) 5-Pin SOT23 (DBV) and NanoStar Wafer Chip Scale (YEQ) Packages
DESCRIPTION
The TPS793xx family of low-dropout (LDO) low-power linear voltage regulators features high power supply rejection ratio (PSRR), ultralow noise, fast start-up, and excellent line and load transient responses in NanoStar wafer chip scale and SOT23 packages. NanoStar packaging gives an ultrasmall footprint as well as an ultralow profile and package weight, making it ideal for portable applications such as handsets and PDAs. Each device in the family is stable, with a small 2.2-µF ceramic capacitor on the output. The TPS793xx family uses an advanced, proprietary BiCMOS fabrication process to yield extremely low dropout voltages (e.g., 112 mV at 200 mA, TPS79330). Each device achieves fast start-up times (approximately 50 µs with a 0.001-µF bypass capacitor) while consuming very low quiescent current (170 µA typical). Moreover, when the device is placed in standby mode, the supply current is reduced to less than 1 µA. The TPS79328 exhibits approximately 32 µVRMS of output voltage noise with a 0.1-µF bypass capacitor. Applications with analog components that are noise sensitive, such as portable RF electronics, benefit from the high PSRR and low-noise features as well as the fast response time.
TPS79328
APPLICATIONS
· · · · · Cellular and Cordless Telephones BluetoothTM, Wireless LAN RF VCOs Handheld Organizers, PDA
DBV PACKAGE (TOP VIEW) IN GND EN 1 2 3 4 BYPASS 5 OUT
TPS79328
OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY
Hz 0.3 VI = 3.8 V Co = 2.2 µF C(byp) = 0.1 µF µ V/
RIPPLE REJECTION vs FREQUENCY
100 90 80 Ripple Rejection - dB 70 60 50 40 30 20 10 VI = 3.8 V Co = 10 µF C(byp) = 0.01 µF 10 100 1k 10 k 100 k 1M 10 M IO = 10 mA IO = 200 mA
Fixed Option DBV PACKAGE (TOP VIEW) IN GND EN 1 2 3 6 5 4 OUT FB BYPASS
0.25 0.2
Output Spectral Noise Density -
0.15 IO = 1 mA 0.1 IO = 200 mA 0.05
Adjustable Option YEQ PACKAGE (TOP VIEW) IN
C3 A3 C1 B2 A1
OUT BYP GND
0 100 1k 10 k f - Frequency - Hz 100 k
0
f - Frequency - Hz
EN
Bluetooth is a trademark of Bluetooth Sig, Inc. NANOSTAR is a trademark of Texas Instruments. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
This document contains information on products in more than one phase of development. The status of each device is indicated ont he page(s) specifiying its electrical characteristics. Note: Multiple devices in mixed product status.
Copyright © 2001 2003, Texas Instruments Incorporated
TPS79301, TPS79318, TPS79325 TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348F JULY 2001 REVISED SEPTEMBER 2003
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AVAILABLE OPTIONS
TJ VOLTAGE 1.22 to 5.5 V 1.8 V 1.8 V 2.5 V 2.5 V 2.8 V -40°C to 125°C 2.8 V 2.85 V 2.85 V 3V 3V 3.3 V 4.75 V (1) (2) (3) PACKAGE SOT23 (DBV) CSP (YEQ) SOT23 (DBV) CSP (YEQ) SOT23 (DBV) CSP (YEQ) SOT23 (DBV) CSP (YEQ) SOT23 (DBV) CSP (YEQ) SOT23 (DBV) PART NUMBER TPS79301DBVR (1) TPS79318DBVR (1) TPS79318YEQ (2) (3) TPS79325DBVR (1) TPS79325YEQ (2) (3) TPS79328DBVR (1) TPS79328YEQ (2) (3) TPS793285DBVR (1) TPS793285YEQ (2) TPS79330DBVR (1) TPS79330YEQ (2) (3) TPS79333DBVR (1) TPS793475DBVR (1) SYMBOL PGVI PHHI 79318 PGWI 79325 PGXI 79328 PHII 793285 PGYI 79330 PHUI PHJI
The DBVR indicates tape and reel of 3000 parts. The YEQR indicates tape and reel of 2500 parts. YEQT indicates tape and reel of 250 parts. Product preview stage of development.
ABSOLUTE MAXIMUM RATINGS
over operating temperature range (unless otherwise noted) (1)
UNIT Input voltage range Voltage range at EN Voltage range at OUT Peak output current ESD rating, HBM ESD rating, CDM Continuous total power dissipation Operating junction temperature range, DBV package Operating junction temperature range, YEQ package Operating ambient temperature range, TA Storage temperature range, Tstg (1) -0.3 V to 6 V -0.3 V to VI + 0.3 V -0.3 V to 6 V Internally limited 2 kV 500 V See Dissipation Rating Table -40°C to 150°C -40°C to 125°C -40°C to 85°C -65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
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TPS79301, TPS79318, TPS79325 TPS79328, TPS793285 TPS79330, TPS79333, TPS793475
SLVS348F JULY 2001 REVISED SEPTEMBER 2003
DISSIPATION RATING TABLE
BOARD Low K (1) High K (2) Low K (1) High K (2) (1) (2) PACKAGE DBV DBV YEQ YEQ RJC 65°C/W 65°C/W 27°C/W 27°C/W RJA 255°C/W 180°C/W 255°C/W 190°C/W DERATING FACTOR ABOVE TA = 25°C 3.9 mW/°C 5.6 mW/°C 3.9 mW/°C 5.3 mW/°C TA 25°C POWER RATING 390 mW 560 mW 390 mW 530 mW TA = 70°C POWER RATING 215 mW 310 mW 215 mW 296 mW TA = 85°C POWER RATING 155 mW 225 mW 155 mW 216 mW
The JEDEC low K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top of the board. The JEDEC high K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board.
ELECTRICAL CHARACTERISTICS
over recommended operating temperature range EN = VI, TJ = -40 to 125 °C, VI = VO(typ) + 1 V, IO= 1 mA, Co = 10 µF, C(byp) = 0.01 µF (unless otherwise noted)
PARAMETER VI Input voltage (1) IO Continuous output current TJ Operating junction temperature TPS79301 TPS79318 TPS79325 TPS79328 Output voltage TPS793285 TPS79330 TPS79333 TPS793475 Quiescent current (GND current) Load regulation Output voltage line regulation (VO/VO) (2) 0 µA< IO < 200 mA, (see Note 4 ) TJ = 25°C 0 µA< IO < 200 mA, TJ = 25°C 0 µA< IO < 200 mA, TJ = 25°C 0 µA< IO < 200 mA, TJ = 25°C 0 µA< IO < 200 mA, TJ = 25°C 0 µA< IO < 200 mA, TJ = 25°C 0 µA IO < 200 mA, TJ = 25°C 0 µA< IO < 200 mA, 0 µA< IO < 200 mA, 0 µA< IO < 200 mA 0 µA< IO < 200 mA, VO + 1 V < VI 5.5 V, VO + 1 V < VI 5.5 V C(byp) = 0.001 µF Output noise voltage (TPS79328) BW = 200 Hz to 100 kHz,IO = 200 mA, TJ = 25°C C(byp) = 0.0047 µF C(byp) = 0.01 µF C(byp) = 0.1 µF Time, start-up (TPS79328) RL = 14 , Co=1 µF, TJ = 25°C C(byp) = 0.001 µF C(byp) = 0.0047 µF C(byp) = 0.01 µF 55 36 33 32 50 70 100 µs µVRMS TJ = 25°C TJ = 25°C 5 0.05 0.12 5.25 V < VI < 5.5 V TJ = 25°C 4.655 170 220 4.3 V < VI < 5.5 V 3.234 4.75 4.845 4 V < VI < 5.5 V 2.94 3.3 3.366 3.85 V < VI < 5.5 V 2.793 3 3.06 3.8 V < VI < 5.5 V 2.744 2.85 2.907 3.5 V < VI < 5.5 V 2.45 2.8 2.856 2.8 V < VI < 5.5 V 1.764 2.5 2.55 1.22 V VO 5.2 V, TEST CONDITIONS MIN 2.7 0 -40 0.98 VO 1.8 1.836 TYP MAX 5.5 200 125 1.02 VO UNIT V mA °C V V V V V V V V µA µA mV %/V
(1) (2)
Minimum V(IN) is 2.7 V or V(OUT) + V(DO), whichever is greater. If VO 2.5 V then V(IN),min = 2.7 V, V(IN),max = 5.5 V. 3
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