FEATURES· Optimized For Off-line And To DC Converters Low Start Up Current (<1mA) Automatic Feed Forward Compensation Pulse-by-pulse Current Limiting Enhanced Load Response Characteristics Under-voltage Lockout With Hysteresis Double Pulse Suppression High Current Totem Pole Output Internally Trimmed Bandgap Reference 500khz Operation Low RO Error Amp DESCRIPTION The UC1842/3/4/5 family of control ICs provides the necessary features to implement off-line to DC fixed frequency current mode control schemes with a minimal external parts count. Internally implemented circuits include under-voltage lockout featuring start up current less than 1mA, a precision reference trimmed for accuracy at the error amp input, logic to insure latched operation, a PWM comparator which also provides current limit control, and a totem pole output stage designed to source or sink high peak current. The output stage, suitable for driving N Channel MOSFETs, is low in the off state. Differences between members of this family are the under-voltage lockout thresholds and maximum duty cycle ranges. The UC1842 and UC1844 have UVLO thresholds of 16V (on) and 10V (off), ideally suited to off-line applications. The corresponding thresholds for the UC1843 and UC1845 are 8.4V and 7.6V. The UC1842 and UC1843 can operate to duty cycles approaching 100%. A range of zero 50% is obtained by the UC1844 and UC1845 by the addition of an internal toggle flip flop which blanks the output off every other clock cycle.
= DIL-8 Pin Number. = SO-14 and CFP-14 Pin Number. Toggle flip flop used only in 1844 and 1845.
Supply Voltage (Low Impedance Source). 30V Supply Voltage (ICC < 30mA). Self Limiting Output Current. ± 1A Output Energy (Capacitive Load). 5µJ Analog Inputs (Pins to +6.3V Error Amp Output Sink Current. 10mA Power Dissipation (DIL-8). 1 Power Dissipation (SOIC-14). 725mW Storage Temperature Range. to +150°C Lead Temperature (Soldering, 10 Seconds). 300°C Note 1: All voltages are with respect to Pin 5. All currents are positive into the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages.
DIL-8, SOIC-8 (TOP VIEW) or J Package, D8 Package PLCC-20 (TOP VIEW) Q Package
PACKAGE PIN FUNCTION PIN 1 N/C COMP 2 N/C VFB N/C ISENSE N/C RT/CT N/C PWR GND GROUND N/C OUTPUT N/C VC VCC N/C VREF
Package TA 25°C Power Rating 700 mW Derating Factor Above 25°C 5.5 mW/°C TA 70°C Power Rating TA 85°C Power Rating TA 125°C Power Rating 150 mW
Unless otherwise stated, these specifications apply for TA 125°C for the TA 85°C for the TA 70°C for the 384X; VCC = 15V (Note = 3.3nF, TA=TJ. TEST CONDITIONS UC1842/3/4/5 UC2842/3/4/5 MIN Reference Section Output Voltage Line Regulation Load Regulation Temp. Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit Oscillator Section Initial Accuracy Voltage Stability Temp. Stability Amplitude Error Amp Section Input Voltage Input Bias Current AVOL Unity Gain Bandwidth PSRR Output Sink Current Output Source Current VOUT High VOUT Low Current Sense Section Gain Maximum Input Signal PSRR Input Bias Current Delay to Output VPIN to 2V (Note 2) (Notes 3 and 4) VPIN = 5V (Note 3) 12 VCC 25V (Note 3) (Note V/V VO 4V (Note 25°C 12 VCC 25V VPIN = 2.7V, VPIN = 1.1V VPIN = 2.3V, VPIN = 5V VPIN 15k to ground VPIN 15k to Pin VPIN µA dB MHz = 25°C (Note 6) 12 VCC 25V TMIN TA TMAX (Note 2) VPIN 4 peak to peak (Note kHz 1mA 12 VIN I0 20mA (Note 2) (Note 7) Line, Load, Temp. (Note 125°C, 1000Hrs. (Note V mV mV/°C mV mA TYP MAX UC3842/3/4/5 MIN TYP MAX UNITS
These parameters, although guaranteed, are not 100% tested in production. Parameter measured at trip point of latch with VPIN = 0. Gain defined as VPIN , 0 VPIN 3 0.8V VPIN 3 Adjust VCC above the start threshold before setting at 15V. Output frequency equals oscillator frequency for the UC1842 and UC1843. Output frequency is one half oscillator frequency for the UC1844 and UC1845. Temperature stability, sometimes referred to as average temperature coefficient, is described by the equation: V (max ) - VREF (min ) Temp Stability = REF TJ (max - TJ (min ) VREF (max) and VREF (min) are the maximum and minimum reference voltages measured over the appropriate temperature range. Note that the extremes in voltage do not necessarily occur at the extremes in temperature.