Details, datasheet, quote on part number: UCC3588PWTR
PartUCC3588PWTR
CategoryPower Management => DC-DC Converters => DC-DC Switching => Switching DC/DC Controllers
TitleSwitching DC/DC Controllers
Descriptionti UCC3588, 5-Bit Programmable Output Bicmos Power Supply Buck Controller
CompanyTexas Instruments, Inc.
DatasheetDownload UCC3588PWTR datasheet
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Features, Applications

UCC3588 5BIT PROGRAMMABLE OUTPUT BiCMOS POWER SUPPLY CONTROLLER

supports Intel Pentium II Microprocessor VID Codes Compatible with or 12-V Systems 1% Output Voltage Accuracy Ensured Drives 2 N-Channel MOSFETs Programmable Frequency to 800 kHz Power Good UV / OVP Voltage Monitor Undervoltage Lockout and Softstart Functions Short Circuit Protection Low Impedance MOSFET Drivers Chip Disable

description

The UCC3588 synchronous step-down (Buck) regulator provides accurate high efficiency power conversion. Using few external components, the UCC1588 converts to an adjustable output ranging from 3.5 VDC to 2.1 VDC in 100-mV steps and 2.05 VDC to 1.3 VDC in 50-mV steps with 1% dc system accuracy. A high level of integration and novel design allow this 16-pin controller to provide a complete control solution for today's demanding microcontroller power requirements. Typical applications include on board or VRM based power conversion for Intel Pentium II microprocessors, as well as other processors from a variety of manufacturers. High efficiency is obtained through the use of synchronous rectification. The softstart function provides a controlled ramp up of the system output voltage. Overcurrent circuitry detects a hard (or soft) short on the system output voltage and invokes a timed softstart/shutdown cycle to reduce the PWM controller on time to 5%. The oscillator frequency is externally programmed with RT and operates over a range of 50 kHz to 800 kHz. The gate drivers are low impedance totem pole output stages capable of driving large external MOSFETs. Cross conduction is eliminated by fixed delay times between turn off and turn on of the external high side and synchronous MOSFETs. The chip includes undervoltage lockout circuitry which assures the correct logic states at the outputs during power up and power down. This device is available in 16-pin surface mount, plastic and ceramic DIP, and TSSOP packages. The UCC3588 is specified for operation from to 70C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

500 F PWRGOODDRVLO D3 D4 SS/ENBL RT 16 GND 1 nF ISNS VSENSE VFB COMP R5 3 VCC DRVHI 150 F
absolute maximum ratings over operating free-air temperature (unless otherwise noted)

Supply voltage VCC. 15 V Gate drive current, 50% duty cycle. 1 A Input voltage, VSENSE, VFB, SS, COMMAND, COMP. 5 V Input voltage, 6 V Input current, RT, COMP. 5 mA

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. All voltages are referenced to GND.

Plastic DIP package, thermal resistance junction to leads, jc. 45C/W thermal resistance junction to ambient, ja. 90C/W Ceramic DIP package, thermal resistance junction to leads, jc. 28C/W thermal resistance junction to ambient, ja. 120C/W Standard surface mount package, thermal resistance junction to leads, jc. 35C/W thermal resistance junction to ambient, ja. 120C/W NOTE The above numbers for ja and jc are maximums for the limiting thermal resistance of the package in a standard mounting configuration. The ja numbers are meant to be guidelines for the thermal performance of the device and PC board system. All of the above numbers

assume no ambient airflow, see the packaging section of Unitrode Product Data Handbook for more details.

PARAMETER Supply Current Section Supply current, on UVLO Section VCC UVLO turnon threshold UVLO threshold hysteresis Voltage Error Amplifier Section Input bias current Open loop gain Output voltage high Output voltage low Output source current Output sink current Oscillator/PWM Section Initial accuracy Ramp amplitude (pp) Ramp valley voltage PWM max duty cycle PWM min duty cycle PWM delay to outputs (high to low) PWM delay to outputs (low to high) Transient Window Comparator Section Detection range high (duty cycle = 0) Detection range low (duty cycle = 1) Propagation delay (VSENSE to outputs) Soft Start/ Shutdown Section SS charge current (normal start-up) SS charge current (short circuit fault condition) SS discharge current (during timeout sequence) Shutdown threshold Restart threshold Soft start complete threshold (normal start up) Measured on SS Measured on SS Measured on SS Measured on SS Measured on SS Measured SS mA Over VCOMMAND, % Under VCOMMAND, See Note 1 See Note nS COMP 3 V COMP 3 V COMP 1.5 V COMP 1.5 V See Note 5 See Note 5 See Note 5 See Note < 70C kHz ns VCM 2.0 V See Note 5 ICOMP 500 mA ICOMP 500 mA VVFB 2 V, VVFB 3 V, VCOMMAND = VCOMP 2.5 V VCOMMAND = VCOMP V mV VCC 12 V, VRT 5.5 mA TEST CONDITIONS MIN TYP MAX UNITS

NOTES: 1. This percentage is measured with respect to the ideal command voltage programmed by the VID (D0,....,D4) pins and applies to all DAC codes from V. 2. Reference and error amplifier offset trimmed while the voltage amplifier is set in unity gain mode. 3. Deadtime delay is measured from the 50% point of DRVHI falling to the 50% point of DRVLO rising, and vice-verse. 4. This time is dependent on the value of CSS. 5. Ensured by design. Not 100% production tested.


 

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