|Category||Semiconductors => Power Management => MOSFET and IGBT Gate Drivers => Low-side Driver|
|Part family||UCC37321 Single 9-A High Speed Low-Side MOSFET Driver With Enable|
|Description||Single 9-A High Speed Low-Side MOSFET Driver With Enable 8-SOIC 0 to 70|
|Company||Texas Instruments, Inc.|
|Datasheet||Download UCC37321 datasheet
|Cross ref.||Similar parts: MAX1614EUA+, MAX1614EUA+T, MAX1614EUA-T, MAX1614EUA/V+, MAX1614EUA/V+T, LTC1693-3CMS8, LTC1693-3CMS8#PBF, LTC1693-3CMS8#TR, LTC1693-3CMS8#TRPBF, MAX4420CPA|
|Operating Temperature Range(C)||0 to 70|
|Approx. Price (US$)||0.99 | 1ku|
|Peak Output Current(A)||9|
|Input Negative Voltage(V)||0|
|Number of Channels(#)||1|
|Channel Input Logic||Inverting|
|Pin nb||Package type||Ind std||JEDEC code||Package qty||Carrier||Device mark||Width (mm)||Length (mm)||Thick (mm)||Pitch (mm)|
|UCC27321 Unencrypted PSpice Transient Model - ZIP (02/17/2016)|
|UCC27321 PSpice Transient Model - ZIP (05/02/2012)|
SINGLE 9A HIGH SPEED LOW-SIDE MOSFET DRIVER WITH ENABLE
Enable Funtion High-Peak Current Drive Capability A at the Miller Plateau Region Using TrueDrive Efficient Constant Current Sourcing Using a Unique BiPolar & CMOS Output Stage TTL/CMOS Compatible Inputs Independent of Supply Voltage 20-ns Typical Rise and Fall Times with 10-nF Load Typical Propagation Delay Times 25 ns With Input Falling and 35 ns with Input Rising to 15-V Supply Voltage Available in Thermally Enhanced MSOP PowerPADTM Package With 4.7°C/W jc Rated From to 105°C Pb-Free Finish (NiPdAu) on SOIC-8 and PDIP-8 Packages
APPLICATIONS D Switch Mode Power Supplies D DC/DC Converters D Motor Controllers D Class-D Switching Amplifiers D Line Drivers D Pulse Transformer Driver DESCRIPTION
The UCC37321/2 family of high-speed drivers deliver A of peak drive current in an industry standard pinout. These drivers can drive the largest of MOSFETs for systems requiring extreme Miller current due to high dV/dt transitions. This eliminates additional external circuits and can replace multiple components to reduce space, design complexity and assembly cost. Two standard logic options are offered, inverting (UCC37321) and noninverting (UCC37322).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPADt is trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Using a design that inherently minimizes shoot-through current, the outputs of these can provide high gate drive current where it is most needed at the Miller plateau region during the MOSFET switching transition. A unique hybrid output stage paralleling bipolar and MOSFET transistors (TrueDrive) allows efficient current delivery at low supply voltages. With this drive architecture, UCC37321/2/3 can be used in industry standard 6-A, 9-A and many 12-A driver applications. Latch up and ESD protection circuitries are also included. Finally, the UCC37321/2 provides an enable (ENBL) function to have better control of the operation of the driver applications. ENBL is implemented on pin 3 which was previously left unused in the industry standard pin-out. It is internally pulled up to Vdd for active high logic and can be left open for standard operation. In addition to SOIC-8 (D) and PDIP-8 (P) package offerings, the UCC37321/2 also comes in the thermally enhanced but tiny 8-pin MSOP PowerPADt (DGN) package. The PowerPADt package drastically lowers the thermal resistance to extend the temperature operation range and improve the long-term reliability.absolute maximum ratings over operating free-air temperature (unless otherwise noted)}
UCCx732x Supply voltage, VDD Output current (OUT) DC, IOUT_DC Input voltage (IN), VIN Enable voltage (ENBL) Power dissipation 25°C D package DGN package P package Junction operating temperature, TJ Storage temperature, Tstg Lead temperature (soldering, 10 sec.) or VDD+0.3 (whichever is larger) or VDD+0.3 (whichever is larger) V UNIT V A
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to GND. Currents are positive into, negative out of the specified terminal.
OUTPUT CONFIGURATION TEMPERATURE RANGE to +70°C PACKAGED DEVICES SOIC-8 (D) UCC37322D MSOP-8 PowerPAD (DGN) UCC37322DGN PDIP-8 (P) UCC37321P UCC27322P
D (SOIC-8) and DGN (PowerPAD-MSOP) packages are available taped and reeled. Add R suffix to device type (e.g. UCC37322DGNR) to order quantities of 2,500 devices per reel.
electrical characteristics, VDD to 105°C for to 70°C for TA = TJ, (unless otherwise noted) input (IN)
PARAMETER VIN_H, logic 1 input threshold VIN_L, logic 0 input threshold Input current 0 V VIN VDD -10 0 TEST CONDITION MIN 1 10 TYP MAX UNITS V µA
PARAMETER Peak output current(1)(2) VOH, output high level VOL, output high level Output resistance high(3) Output resistance low(3) latch-up protection(1) TEST CONDITION VDD 14 V, VOH = VDD VOUT, IOUT -10 mA IOUT 10 mA IOUT = -10 mA, IOUT = 10 mA, VDD 14 V VDD V 500 MIN TYP MAX UNITS mV mA
PARAMETER IN = LO, EN = LO, UCC37321 UCC27321 IDD, static operating current IN = HI, IN = HI, IN = HI, IN = HI, EN = LO, EN = HI, EN = LO, EN = HI, IN = LO, EN = HI, IN = LO, EN = LO, IN = LO, EN = HI, TEST CONDITION VDD 15 V VDD 15 V VDD 15 V VDD 15 V VDD 15 V VDD 15 V VDD 15 V VDD 15 V MIN TYP MAX µA UNITS
PARAMETER VIN_H, high-level input voltage VIN_L, low-level input voltage Hysteresis RENBL, enable impedance tD3, propagation delay time(5) tD4, propagation delay time(5) VDD 14 V, CLOAD 10 nF CLOAD 10 nF ENBL = GND to HI transition to LO transition TEST CONDITION MIN TYP MAX V k UNITS V
NOTES: 1. Ensured by design. Not tested in production. 2. The pullup / pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The peak output current rating is the combined current from the bipolar and MOSFET transistors. 3. The pullup / pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The output resistance is the RDS(ON) of the MOSFET transistor when the voltage on the driver output is less than the saturation voltage of the bipolar transistor. 5. See Figure 2.
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