|Category||Analog & Mixed-Signal Processing|
|Company||Texas Instruments, Inc.|
|Datasheet||Download UCC3752 datasheet
Novel Topology for Low-Cost, Efficient The UCC3752 controller is designed for driving a power stage that generGeneration of Ring Voltage ates low frequency, high voltage sinusoidal signals for telephone ringing applications. The controller and the power stage are most suitable for up to Suitable for Multi-Line Operation 5 line applications where low cost, high efficiency and minimum parts count Selectable 20, 25 and 50 Hz Ring are critical. A semi-regulated DC voltage is added as an offset to the ringFrequency ing signal. The ring generator operation is non-isolated and open loop. Secondary (AC) Current Limiting Generates an Off-Hook Detect Signal Primary Current Limiting to Turn Power Stage Off Under Fault Conditions Operates from a Single 12V Supply The UCC3752 directly drives primary side switches used to implement a push-pull resonant converter topology and transformer coupled sampling switches located on the secondary of the converter. For normal ring signal generation, the primary switching frequency and secondary sampling frequency are precisely offset from each other by the ringing frequency to produce a high voltage low frequency alias signal at the output. The off-hook condition is detected by sensing the AC current and when AC limit is exceeded, a flag is generated on the OFFHOOK pin. The drive signal frequencies are derived from a high frequency (3579545 Hz) crystal. The primary switching frequency is 89.489 kHz and the sampling frequency 50 Hz less depending on the status of frequency select pins FS0 and FS1.
The circuits described in this datasheet are covered under US Patent #5,663,878 and other patents pending.D1 RSENSE LIN T1 VIN LR CR2 SAMPLING CIRCUIT CBYP1 AC SIGNAL CF VOUT CDC DC SIGNAL V1
Input Supply Voltage. 13.2V Analog Inputs (OHD, DCLIM, XTAL1, XTAL2) Maximum Forced Voltage. to 5V Logic Inputs Maximum Forced Voltage. to 7.5V Reference Output Current (VDD). Internally Limited Output Current (DRV1, DRV2, DRVS) Pulsed. 1.5A Operating Junction Temperature. to +125°C Storage Temperature. to +150°C
Note: Unless otherwise indicated, voltages are referenced to ground and currents are positive into, negative out of, the specific terminals. Pulsed is defined as a less than 10% duty cycle with a maximum duration 500 S.
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications hold for to 70°C for the UCC3752 and to +85°C for the TA = TJ.
PARAMETER V12 Supply Current Section Supply Current ENABLE = 0V ENABLE = 5V Internal Reference with External Bypass Section Output Voltage (VDD) Load Regulation Line Regulation Short Circuit Current Output Drivers Section (DRV1, DRV2) Pull Up Resistance Pull Down Resistance Rise Time Fall Time Output Drivers Section (DRVS) Pull Up Resistance Pull Down Resistance Sample Pulse-Width Rise Time Fall Time ILOAD to 20mA ILOAD to 20mA Mode 1 (Table 1) CLOAD = 1nF CLOAD 1nF nS ILOAD to 20mA ILOAD to 20mA CLOAD = 1nF CLOAD nS 0mA IVDD < 13V, IVDD = 1mA VDD mV mA TEST CONDITIONS MIN TYP MAX UNITS
UCC2752 UCC3752 ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications hold for to 70°C for the UCC3752 and to +85°C for the TA = TJ.
PARAMETER Current Limit Section DCLIM Threshold DCLIM Input Current OffHook Detect Section OHD Threshold OHD Input Current Offhook VOH Offhook VOL Offhook Pull-Up Impedance Offhook Pull-Down Impedance Frequency Section (Table 1) Primary Switching Frequency Sampling Switching Frequency All cases 3.579545 MHz Crystal = 0, Mode 1, (Table = 0, Mode = 1, Mode Hz VOHD = 0V IOFFHOOK = 1mA IOFFHOOK = 1mA ILOAD to 1mA ILOAD nA V VDCLIM mV nA TEST CONDITIONS MIN TYP MAX UNITS
DCLIM: Primary current sense input. Signal proportional to the primary switch current. All outputs are turned off when a threshold 300mV is exceeded on this pin. This current-limit works on a cycle-by-cycle basis. DRV1, DRV2: Low impedance driver outputs for the primary switches. DRV1 and DRV2 are complimentary and have 50% duty cycle. DRVS: Low impedance driver output for the sampling switch(es). The pulse width of this output is 280ns. Typically, a pulse transformer is used to couple the short sampling pulses at DRVS to the floating sampling switch(es). ENABLE: Logic input which turns off the outputs when low. FS0, FS1: Frequency select pins for determining the difference frequency between primary and secondary pulses under normal operation. These pins can be hardwired to GND or VDD to get one of the available output frequencies (20,25 and 50 Hz). See Table 1 in the spec table. GND: Reference point for all the internal voltages and common return for the device. OFFHOOK: Output indicating the off-hook condition. This signal can be used by an external circuit to switch to a line from the ring generator output to the DC voltage. OHD: Off-Hook Detect. Voltage proportional to output current DC level is fed into this pin and compared to an internal threshold 300mV. If the threshold is exceeded, the OFFHOOK output goes high. PGND: Return point for the output drivers. Connect to GND at a single point in the circuit. VDD: Internal regulated 5V supply. This voltage is used to power all the internal precision circuits of the IC. This pin needs to be bypassed to GND with ceramic capacitor. VS12: External 12V power supply for the IC. Powers VDD and provides voltage for the output drivers. XTAL1, XTAL2: Pins for connecting precision Crystal to attain the accurate output frequencies. An external square-wave pulse can also be applied XTAL1 is tied to VDD/2.
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