Details, datasheet, quote on part number: UCC3808AD-1
PartUCC3808AD-1
CategorySemiconductors => Power Management => Offline and Isolated DC/DC Controllers and Converters => PWM and Resonant Controller
Part familyUCC3808A-1 Low-Power Current-Mode Push-Pull PWM
TitleCurrent Mode
DescriptionLow-Power Current-Mode Push-Pull PWM 8-SOIC 0 to 70
CompanyTexas Instruments, Inc.
StatusACTIVE
ROHSY
SampleYes
DatasheetDownload UCC3808AD-1 datasheet
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Specifications 
Operating Temperature Range(C)0 to 70
UVLO Thresholds On/Off(V)12.5/8.3
Frequency(Max)(kHz)1000
RatingCatalog
Approx. Price (US$)0.99 | 1ku
FeaturesError Amplifier,Multi-topology,Soft Start
Duty Cycle(Max)(%)49
Vin(Min)(V)8.3
TopologyPush-Pull
Package GroupPDIP,SOIC
Control MethodCurrent
Gate Drive(Typ)(A)1
Vin(Max)(V)15
  Mecanical Data
Pin nbPackage typeInd stdJEDEC codePackage qtyCarrierDevice markWidth (mm)Length (mm)Thick (mm)Pitch (mm)
8DSOICR-PDSO-G75TUBE3808A-1 3.914.91.581.27
Application notes
• Current Doubler Rectifier Offers Ripple Current Cancellation | Doc

 

Features, Applications

Configuration Current Sense Discharge Transistor to Improve Dynamic Response 130-A Typical Starting Current 1-mA Typical Run Current Operation to 1 MHz Internal Soft Start On-Chip Error Amplifier With 2-MHz Gain Bandwidth Product On Chip VDD Clamping Output Drive Stages Capable of 500-mA Peak-Source Current, 1-A Peak-Sink Current

OR N PACKAGE (TOP VIEW) COMP CS RC VDD OUTA OUTB GND
PW PACKAGE (TOP VIEW) OUTA VDD COMP FB OUTB GND RC CS
description

The is a family of BiCMOS push-pull, high-speed, low-power, pulse-width modulators. The UCC3808A contains all of the control and drive circuitry required for off-line or dc-to-dc fixed frequency current-mode switching power supplies with minimal external parts count. The UCC3808A dual output drive stages are arranged in a push-pull configuration. Both outputs switch at half the oscillator frequency using a toggle flip-flop. The dead time between the two outputs is typically 200 ns depending on the values of the timing capacitor and resistors, thus limiting each output stage duty cycle to less than 50%.

FB 2 COMP 3 8 OVERCURRENT COMPARATOR V 7 VDD 0.5 V SOFT START VOLTAGE REFERENCE VDD R 6 OUTB PWM COMPARATOR PWM LATCH OSCILLATOR OUTA 22 k PEAK CURRENT COMPARATOR 14 V VDD

Note: Pinout shown is for SOIC and PDIP packages. TSSOP pinout is different.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

The UCC3808A family offers a variety of package options, temperature range options, and choice of undervoltage lockout levels. The family has UVLO thresholds and hysteresis options for off-line and battery powered systems. Thresholds are shown in the table below. The is an enhanced version of the UCC3808 family. The significant difference is that the A versions feature an internal discharge transistor from the CS pin to ground, which is activated each clock cycle during the oscillator dead time. The feature discharges any filter capacitance on the CS pin during each cycle and helps minimize filter capacitor values and current sense delay.

ORDERING INFORMATION Packaged Devices to 70C UVLO Option V/4.1 V SOIC (D) UCC3808AD1 UCC3808AD2 PDIP (N) UCC3808AN1 UCC3808AN2 TSSOP (PW) UCC2808APW2 UCC3808APW1

D (SOIC8) and PW (TSSOP8) packages are available taped and reeled. Add TR suffix to device type (e.g. UCC3808ADTR1) to order quantities of 2500 devices per reel for SOIC-8 and 2000 devices per reel for TSSOP-8.

absolute maximum ratings over operating free-air temperature (unless otherwise noted)

Supply voltage (IDD 10 mA). 15 V Supply current. 20 mA OUTA/OUTB source current (peak). 0.5 A OUTA/OUTB sink current (peak). 1.0 A Analog inputs (FB, CS). V to VDD 0.3 V, not to exceed 6 V Power dissipation 25C (N package). 1 W Power dissipation 25C (D package). 650 mW Power dissipation = 25C (PW package). 400 mW Storage temperature, Tstg. 65C to150C Junction temperature, TJ. to 150C Lead temperature (soldering, 10 sec.). 300C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Power Supply Control Data Book (TI Literature Number SLUD003) for thermal limitations and considerations of packages.

electrical characteristics, to 70C for the to 85C for the UCC2808A-x, VDD 10 V (see Note 6), 1-F capacitor from VDD to GND, TA = TJ, (unless otherwise noted)

PARAMETER Oscillator Section Oscillator frequency Oscillator amplitude/VDD See Note 1 NOTES: 1. Measured at RC. Signal amplitude tracks VDD. 6. For UCCx808A1, set VDD above the start threshold before setting 10 V. kHz V/V TEST CONDITIONS MIN TYP MAX UNITS

electrical characteristics, to 70C for the to 85C for the UCC2808A-x, VDD 10 V (see Note 6), 1-F capacitor from VDD to GND, TA = TJ, (unless otherwise noted)

Error Amplifier Section Input voltage Input bias current Open loop voltage gain COMP sink current COMP source current PWM Section Maximum duty cycle Minimum duty cycle Current Sense Section Gain Maximum input signal CS to output delay CS source current CS sink current Over current threshold COMP to CS offset Output Section OUT low level OUT high level Rise time Fall time Undervoltage Lockout Section UCCx808A1 Start threshold Minimum operating voltage after start H steresis Hysteresis Soft Start Section COMP rise time Overall Section Startup current Operating supply current VDD zener shunt voltage NOTES: DV VDD < start threshold 0 V, IDD 0 V See Note 4 See Note 5 and 1.8 V, Rise from UCCx808A1 UCCx808A2 See Note = 50 mA, 1 nF VDD OUT 5.5 V See Note 7 See Note 2 COMP 5 V COMP 3.5 V, See Note 3 CS from 600 mV V/V mA V Measured at OUTA or OUTB COMP 1.3 V, COMP 1 V COMP 3.5 V COMP dB mA

COMP, 0 V Gain is defined by: DV CS Parameter measured at trip point of latch with 0 V. Start threshold and zener shunt threshold track one another. Does not include current in the external oscillator network. For UCCx808A1, set VDD above the start threshold before setting 10 V. The internal current sink on the CS pin is designed to discharge an external filter capacitor. It is not intended a dc sink path.


 

Related products with the same datasheet
UCC3808ADTR-1
UCC3808AN-1
UCC3808APW-1
UCC3808APWTR-1
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