|Description||CMOS Voltage Detector|
|Datasheet||Download XC6111B241 datasheet
CMOS Voltage Detector Manual Reset Input Watchdog Functions Built-in Delay Circuit Detect Voltage Range: ± 2% Reset Function is Selectable VDFL (Low When Detected) VDFH (High When Detected)APPLICATIONS
Microprocessor reset circuits Memory battery backup circuits System power-on reset circuits Power failure detection
The XC6101~XC6107, XC6111~XC6117 series are groups of high-precision, low current consumption voltage detectors with manual reset input function and watchdog functions incorporating CMOS process technology. The series consist of a reference voltage source, delay circuit, comparator, and output driver. With the built-in delay circuit, the ~ XC6117 series' ICs do not require any external components to output signals with release delay time. Moreover, with the manual reset function, reset can be asserted at any time. The ICs produce two types of output; VDFL (low when detected) and VDFH (high when detected). With the ~ XC6115 series' ICs, the WD pin can be left open if the watchdog function is not used. Whenever the watchdog pin is opened, the internal counter clears before the watchdog timeout occurs. Since the manual reset pin is internally pulled up to the VIN pin voltage level, the ICs can be used with the manual reset pin left unconnected if the pin is unused. The detect voltages are internally fixed 5.0V in increments of 100mV, using laser trimming technology. Six watchdog timeout period settings are available in a range from to 1.6sec. Seven release delay time 1 are available in a range from to 1.6sec.FEATURES
Operating Voltage Range Detect Voltage Temperature Characteristics : +100ppm/OC (TYP.) Output Configuration : N-channel open drain, CMOS Watchdog Pin : Watchdog input If watchdog input maintains `H' or `L' within the watchdog timeout period, a reset signal is output to the RESET output pin Manual Reset Pin : When driven `H' to `L' level signal, the MRB pin voltage asserts forced reset on the output pin. Release Delay Time 25msec, 3.13msec (TYP.) can be selectable. Watchdog Timeout Period 50msec, 6.25msec (TYP.) can be selectable.
XC6101, XC6102 Series XC6111, XC6112 Series & XC6113 Series XC6104, XC6105 Series XC6114, XC6115 Series XC6106, XC6107 Series XC6116, XC6117 Series
* The dissipation pad for the USP-6C package should be solder-plated in recommended mount pattern and metal masking as to enhance mounting strength and heat release. If the pad needs to be connected to other pins, it should be connected to the VSS pin.
Reset Output (VDFL: Low Level When Detected) Ground Manual Reset Watchdog Power Input Reset Output (VDFH: High Level When Detected)
MANUAL RESET Available Not Available Not Available CMOS N-channel open drain CMOS N-channel open drain CMOS N-channel open drain RESET OUTPUT VDFL (RESETB) VDFH (RESET) CMOS
DESIGNATOR DESCRIPTION Hysteresis Range Functions and Type of Reset Output SYMBOL B C Release Delay Time Watchdog Timeout Period Detect Voltage Package Device Orientation ~ 50 DESCRIPTION : VDF x 5% (TYP.) with hysteresis : VDF x 0.1% (TYP.) without hysteresis : Watchdog and manual functions, and reset output type as per Selection Guide in the above chart : 3.13msec (TYP.) : 25msec (TYP.) : 50msec (TYP.) : 100msec (TYP.) : 200msec (TYP.) : 400msec (TYP.) : 1.6sec (TYP.) No WD timeout period for XC6116, XC6117 Series : 6.25msec (TYP.) : 50msec (TYP.) : 100msec (TYP.) : 200msec (TYP.) : 400msec (TYP.) : 1.6sec (TYP.) : Detect voltage ex.) USP-6C : Embossed tape, standard feed : Embossed tape, reverse feed
* Please set the release delay time shorter than or equal to the watchdog timeout period. ex.) or XC6101D327MR
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