Details, datasheet, quote on part number: TC59SM804CFT
PartTC59SM804CFT
CategoryMemory => DRAM
DescriptionType = Sdram ;; Density (Mb) = 256 ;; Geometry = 64M X 4 ;; Refresh = 8K/64ms ;; Features = PC100/PC133 ;; Power = Standard/low ;; Date = 2001-02-01
CompanyToshiba America Electronic Components, Inc.
DatasheetDownload TC59SM804CFT datasheet
  

 

Features, Applications
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC

4 BANKS 16-BITS SYNCHRONOUS DYNAMIC RAM 4 BANKS 8-BITS SYNCHRONOUS DYNAMIC RAM 4 BANKS 4-BITS SYNCHRONOUS DYNAMIC RAM DESCRIPTION

is a CMOS synchronous dynamic random access memory organized 4 banks 16 bits and TC59SM808CFT/CFTL is organized as 8,388,608 words 4 banks 8 bits and The TC59SM804CFT/CFTL is organized as 16,777,216 words 4 banks 4 bits. Fully synchronous operations are referenced to the positive edges of clock input and can transfer data to 143M words per second. These devices are controlled by commands setting. Each bank are kept active so that DRAM core sense amplifiers can be used as a cache. The refresh functions, either Auto Refresh or Self Refresh are easy to use. By having a programmable Mode Register, the system can choose the most suitable modes which will maximize its performance. These devices are ideal for main memory in applications such as work-stations.

FEATURES

tRAS Active to Precharge Command Period (min) tAC tRC Access Time from CLK (max) Ref/Active to Ref/Active Command Period (min)

ICC1 Operation Current (max) (Single bank) ICC4 Burst Operation Current (max) ICC6 Self-Refresh Current (max)

Single power supply to 143 MHz clock frequency Synchronous operations: All signals referenced to the positive edges of clock Architecture: Pipeline Organization TC59SM816CFT/CFTL: 4,194,304 words 4 banks 16 bits TC59SM808CFT/CFTL: 8,388,608 words 4 banks 8 bits TC59SM804CFT/CFTL: 16,777,216 words 4 banks 4 bits Programmable Mode register Auto Refresh and Self Refresh Burst Length: Full page CAS Latency: 2, 3 Single Write Mode Burst Stop Function Byte Data Controlled by LDQM, UDQM (TC59SM816) 8K Refresh cycles/64 ms Interface: LVTTL Package TC59SM804CFT/CFTL: TSOPII54-P-400-0.80B

TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk.

Address Input Bank Select TC59SM808CFT/CFTL TC59SM804CFT/CFTL VCC DQ0 NC VCCQ DQ1 DQ0 VSSQ DQ2 NC VCCQ DQ3 DQ1 VSSQ DQ7 NC VCC LDQM NC WE CAS RAS A2 A3 VCC VSS NC VSSQ NC DQ3 VCCQ NC VSSQ NC DQ2 VCCQ NC VSS NC DQM CLK CKE A5 A4 VSS DQ7 VSSQ NC DQ6 VCCQ NC DQ5 VSSQ NC DQ4 VCCQ NC VSS NC DQM CLK CKE A5 A4 VSS DQ15 VSSQ DQ14 DQ13 VCCQ DQ12 DQ11 VSSQ DQ10 DQ9 VCCQ DQ8 VSS NC UDQM CLK CKE A5 A4 VSS

Chip Select Row Address Strobe Column Address Strobe Write Enable

Output Disable/Write Mask UDQM/LDQM (TC59SM816) CLK CKE VCC VSS VCCQ VSSQ NC Clock input Clock enable Power (+3.3 V) Ground Power (+3.3 V) (for DQ buffer) Ground (for DQ buffer) No Connection

The products described in this document are subject to the foreign exchange and foreign trade laws. The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. The information contained herein is subject to change without notice.

CONTROL SIGNAL GENERATOR COLUMN DECODER ROW DECODER ROW DECODER COLUMN DECODER
A10 MODE ADDRESS BUFFER BS0 BS1 REFRESH COUNTER COLUMN COUNTER REGISTER

NOTE: The TC59SM804CFT/CFTL configuration is of cell array with the DQ pins numbered DQ0~DQ3. The TC59SM808CFT/CFTL configuration is of cell array with the DQ pins numbered DQ0~DQ7. The TC59SM816CFT/CFTL configuration is of cell array with the DQ pins numbered DQ0~DQ15.


 

Related products with the same datasheet
TC59SM808CFT
TC59SM816CFT
Some Part number from the same manufacture Toshiba America Electronic Components, Inc.
TC59SM804CMB Type = Sdram ;; Density (Mb) = 256 ;; Geometry = 64M X 4 ;; Refresh = 8K/64ms ;; Features = PC100/PC133; 60-CSP ;; Power = Standard/low ;; Date = 2001-08-08
TC59SM808BFT
TC59SM808CFT
TC59SM808CMB
TC59SM816BFT
TC59SM816CFT
TC59SM816CFTI Type = Sdram ;; Density (Mb) = 256 ;; Geometry = 16Mx16 ;; Refresh = 8K/64ms ;; Features = PC100/PC133/Industrial Temp ;; Power = Standard ;; Date = 2001-06-18
TC59SM816CMB Type = Sdram ;; Density (Mb) = 256 ;; Geometry = 64M X 4 ;; Refresh = 8K/64ms ;; Features = PC100/PC133; 60-CSP ;; Power = Standard/low ;; Date = 2001-08-08
TC59WM803BFT Type = DDR ;; Density (Mb) = 256 ;; Geometry = 64M X 4 ;; Refresh = 8K/64ms ;; Features = DDR266A, DDR266B, DDR200 ;; Power = Standard ;; Date = 2000-12-13
TC5BV32ADC 32mb (4mx8-bit) CMOS NAND E2PROM(4m Byte Smartmedia(tm))
TC6371AF Host Bus Interface = Pci ;; Sdio Support = no ;; Card Interface = SD Memory Card or Smartmedia ;; Additional Information = More Info
TC6374AF Secure Digital Host Controllers (SDHC) Are The First Standalone Chips to Provide a Dedicated Hardware Interface For SD Memory, Smartmedia And Multimedia Cards And CAN be Integrated Into Laptops, Cell Phones,
TC6377AF Host Bus Interface = Standard Memory I/f (SRAM Like) ;; Sdio Support = no ;; Card Interface = SD Memory Card + SD or Smartmedia Card ;; Additional Information = More Info
TC6380AF Host Bus Interface = Standard Memory I/f (SRAM Like) ;; Sdio Support = Yes ;; Card Interface = SD Memory Card or Smartmedia ;; Additional Information = More Info
TC6384AF Secure Digital Host Controllers (SDHC) Are The First Standalone Chips to Provide a Dedicated Hardware Interface For SD Memory, Smartmedia And Multimedia Cards And CAN be Integrated Into Laptops, Cell Phones,
TC6387XB
TC6391XB Host Bus Interface = Standard Memory I/f (SRAM Like) ;; Sdio Support = Yes ;; Card Interface = SD Memory Card/sdio Card or Smartmedia or Compact Flash or Usb ;; Additional Information = More Info
TC6393XB Secure Digital Host Controllers (SDHC) Are The First Standalone Chips to Provide a Dedicated Hardware Interface For SD Memory, Smartmedia And Multimedia Cards And CAN be Integrated Into Laptops, Cell Phones,
TC74AC00 Quad 2-input NAND Gate
TC74AC00F
TC74AC00FN Function = Quad 2-input NAND Gate ;; Pins = 14
Same catergory

71V3576 : 3.3V 128K X 36 Synchronous Pipelined Burst SRAM W/3.3V I/o. 18 3.3V Synchronous SRAMs 3.3V I/O, Pipelined Outputs Burst Counter, Single Cycle Deselect x 18 memory configurations Supports high system speed: Commercial and Industrial: 150MHz 3.8ns clock access time 133MHz 4.2ns clock access time LBO input selects interleaved or linear burst mode Self-timed write cycle with global write control (GW), byte write.

72115 : 512 X 16 Parallel-to-serial Fifo, 5.0V. 25ns parallel port access time, 35ns cycle time 45MHz serial output shift rate Wide x16 organization offering easy expansion Low power consumption (50mA typical) Least/Most Significant Bit first read selected by asserting the FL/DIR pin Four memory status flags: Empty, Full, Half-Full, and Almost-Empty/Almost-Full Dual-Port zero fall-through architecture.

GM71V16403C : . The GM71V(S)16403C/CL is the new generation dynamic RAM organized 4,194,304 words x 4 bit. GM71V(S)16403C/CL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The GM71V(S)16403C/CL offers Extended Data Out (EDO) Page Mode as a high speed access mode. Multiplexed address inputs permit.

GM71V65163C : . The GM71V(S)65163C/CL is the new generation dynamic RAM organized 4,196,304 words by 16 bits. The GM71V(S)65163C/CL utilizes advanced CMOS Silicon Gate Process Technology as well as advanced circuit techniques for wide operating margins, both internally and to the system user. System oriented include single power supply of 3.3V+/-10% tolerance, direct.

HT24LC16 : HT24LC16 CMOS 16K 2-Wire Serial EePROM. Operating voltage: 2.2V~5.5V Low power consumption - Operation: 5mA max. - Standby: 5mA max. Internal organization: 20488 2-wire Serial Interface Write cycle time: 5ms max. Automatic erase-before-write operation Partial page write allowed 16-byte Page Write Mode Write operation with built-in timer Hardware controlled write protection 40-year data retention.

HYS64D32020GDL-7-B : 128MB-1GB, 200pin Small Outlines For Laptop. 2.5V 200Pin DDR Small Outline SDRAM Modules & 256MB Modules & PC2700 Data Sheet Revision 1.01 (Jan. 2003) 200Pin Unbuffered 8-Byte Dual-In-Line DDR-I SDRAM non-parity Small Outline Modules One bank 16Mx64 and two bank 64 organization JEDEC standard Double Data Rate Synchronous DRAMs (DDR-I SDRAM) Single +2.5V 0.2V) power supply Built with 256Mbit.

IS61LV5128AL : 512Kx8 High-speed CMOS Static RAM. High-speed access times: 10, 12 ns High-performance, low-power CMOS process Multiple center power and ground pins for greater noise immunity Easy memory expansion with CE and OE options CE power-down Fully static operation: no clock or refresh required TTL compatible inputs and outputs Single 3.3V power supply Packages available: 36-pin 400-mil SOJ 36-pin.

KM48S8030C : 2m X 8bit X 4 Banks Synchronous DRAM. JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs CAS latency 3 only Burst length Full page) Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Burst read single-bit write operation DQM for masking Auto & self refresh.

M372V3200DT1 : Buffered DIMM. = M372V3200DT1 32Mx72 DRAM Dimm With Ecc Using 16Mx4,4K&8KRefresh,3.3V ;; Density(MB) = 256 ;; Organization = 32Mx72 ;; Mode = Fast Page ;; Refresh = 4K/64ms ;; Speed(ns) = 50,60 ;; #of Pin = 168 ;; Component Composition = (16Mx4)x36+Drive ICx2 ;; Production Status = Eol ;; Comments = Buffered.

W24512A : 64k X 8 High Speed CMOS Static RAM.

W27E257 : ->UV/EPROM. 32K X 8 Electrically Erasable EPROM.

W963B6BBN : SRAM. 512Kx16.

K4S1G0632D : st.32M x 4Bit x 4 Banks SDRAM The K4S1G0632D is 1,073,741,824bits synchronous high data rate Dynamic RAM organized as 4 x 67,108,864 words by 8 bits, fabricated with SAMSUNG's high performance CMOS technology..

AT25080A-10PA-5.0C : 1K X 8 SPI BUS SERIAL EEPROM, PDIP8. s: Density: 8 kbits ; Number of Words: 1 k ; Bits per Word: 8 bits ; Bus Type: Serial ; Production Status: Full Production ; Data Rate: 5 MHz ; Supply Voltage: 5V ; Package Type: 0.300 INCH, PLASTIC, MS-001BA, DIP-8, DIP ; Pins: 8 ; Operating Range: AUTOMOTIVE ; Operating Temperature: -40 to 125 C (-40 to 257 F).

CY7C1470BV33-167BZXCT : IC,SYNC SRAM,2MX36,CMOS,BGA,165PIN,PLASTIC. s: Memory Category: SRAM Chip.

IS66WV25616ALL-70BLI : 256K X 16 PSEUDO STATIC RAM, 70 ns, PBGA48. s: Memory Category: SRAM Chip ; Density: 4194 kbits ; Number of Words: 256 k ; Bits per Word: 16 bits ; Package Type: BGA, 8 X 13 MM, LEAD FREE, MINI, BGA-48 ; Pins: 48 ; Logic Family: CMOS ; Supply Voltage: 1.8V ; Access Time: 70 ns ; Operating Temperature: -40 to 85 C (-40 to 185 F).

M95512-DRCS6G : IC,SERIAL EEPROM,64KX8,CMOS,BGA,8PIN,PLASTIC. s: Memory Category: PROM.

MT4C4256C-12/883C : 256K X 4 FAST PAGE DRAM, 120 ns, CDIP20. s: Memory Category: DRAM Chip ; Density: 1049 kbits ; Number of Words: 256 k ; Bits per Word: 4 bits ; Package Type: DIP, 0.300 INCH, CERAMIC, DIP-20 ; Pins: 20 ; Logic Family: CMOS ; Supply Voltage: 5V ; Access Time: 120 ns ; Operating Temperature: -55 to 125 C (-67 to 257 F).

MX29F016R4C-12 : 2M X 8 FLASH 5V PROM, 120 ns, PDSO40. s: Memory Category: Flash, PROM ; Density: 16777 kbits ; Number of Words: 2000 k ; Bits per Word: 8 bits ; Package Type: TSOP, 10 X 20 MM, PLASTIC, REVERSE, TSOP1-40 ; Pins: 40 ; Logic Family: CMOS ; Supply Voltage: 5V ; Access Time: 120 ns ; Operating Temperature: 0 to 70 C (32 to 158 F).

NT6TL64M32AQ-G1 : 64M X 32 DDR DRAM, 5.5 ns, PBGA168. s: Memory Category: DRAM Chip ; Density: 2147484 kbits ; Number of Words: 64000 k ; Bits per Word: 32 bits ; Package Type: 12 X 12 MM, 0.50 MM PITCH, HALOGEN FREE AND ROHS COMPLIANT, VFBGA-168 ; Pins: 168 ; Logic Family: CMOS ; Access Time: 5.5 ns.

 
0-C     D-L     M-R     S-Z