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Details, datasheet, quote on part number:UT6164C64AT-5
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| Part: | UT6164C64AT-5 |
| Category: | Memory => SRAM => Sync. SRAM => Synchronous Pipelined Burst SRAM |
| Description: | Density = 4M ;; Org. = 64Kx64 ;; Voltage = 3.3V ;; Speed (ns) = 5/6/7 ;; Vio = 3.3/2.5 ;; Package Type = 128 Pqfp, TQFP |
| Company: | Utron technology |
| Datasheet: | Download UT6164C64AT-5 datasheet File size : 226 kB |
| Request For quote: | Find where to buy UT6164C64AT-5
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Datasheet text preview:
UTRON
FEATURES
Single 3.3V -5% and +10% power supply Support 2.5V I/O Fast clock access time: 5ns /100MHz, 6ns /75MHz, 7ns /66Mhz 2 clocks chip enable/1 clock chip disable operation 5V-tolerant inputs, TTL/LVTTL compatible outputs
UT6164C64A
64K X 64 SYNCHRONOUS PIPELINED BURST CMOS SRAM Rev 1.1 _______________________________________________________________________________________________
Synchronous pipeline operation Internally self-timed WRITE cycle BYTE WRITE and GLOBAL WRITE control WRITE pass-through capability Burst control pin (interleaved or linear burst) ZZ snooze mode control 128-pin PQFP and TQFP package
GENERAL DESCRIPTION
The UT6164C64A is a 4,194,304-bit synchronous pipelined burst CMOS SRAM organized as 65,536 words by 64 bits. It is fabricated with high performance and high reliability CMOS technology. The UT6164C64A integrates 65,536 x 64 SRAM cells with advanced synchronous peripheral circuitry and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered clock input (CLK). The synchronous inputs include addresses, data inputs, address-pipelining chip enable (CE#), burst control inputs (ADSC#, ADSP#, and ADV#), write enables (BW1#, BW2#, BW3#, BW4#, BW5#, BW6#, BW7#, BW8# and BWE#), and global write (GW#). Asynchronous inputs include the output enable (OE#). The data outputs (I/O), enabled by OE#, are also asynchronous. Addresses and chip enables are registered with either address status processor (ADSP#) or address status controller (ADSC#) input pins. Subsequent burst addresses can be internally generated as controlled by the burst advance pin (ADV#). Address, data inputs, and wire controls are registered on-chip to initiate self-timed WRITE cycle. WRITE cycles can be one to four bytes wide as controlled by the write control inputs. Individual byte write allows individual byte to be written. BW1# controls I/O1-I/O8. BW2# controls I/O9-I/O16. BW3# controls I/O17-I/O24. BW4# controls I/O25-I/O32. BW5# controls I/O33-I/O40. BW6# controls I/O41-I/O48. BW7# controls I/O49-I/O56. BW8# controls I/O57-I/O64. BW1#, BW2#, BW3#, BW4#, BW5#, BW6#, BW7# and BW8# can be active only with BWE# being LOW. GW# being LOW causes all bytes to be written. WRITE pass-through capability allows written data available at the output for the immediately next READ cycle. This device also incorporates pipelined enable circuit for easy depth expansion without penalizing system performance. The UT6164C64A operates from a +3.3V power supply. All inputs and outputs are TTLcompatible. The devise is ideally suited for 486, PentiumTM, 680X0, and PowerPC systems and for systems that are benefited from a wide synchronous data bus.
UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
P80003
1
UTRON
FUNCTIONAL BLOCK DIAGRAM
Address Register
UT6164C64A
64K X 64 SYNCHRONOUS PIPELINED BURST CMOS SRAM Rev 1.1 _______________________________________________________________________________________________
A0 - A15
A2 - A15
VCC
A0 - A1
Burst Address Counter
64K X 64 Memory Array
A`0 - A'1
VSS
CLK ADSP# ADSC# ADV# MODE ZZ
Clock Control
Data In Register
Output Register
CE1# CE2 CE3# OE# GW#
Chip Enable Control
Control Logic Buffer
VccQ VssQ
BWE#
Byte Write Control
I/O1 - I/O64
BW1#-BW8#
UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
P80003
2
UTRON
Rev 1.1
UT6164C64A
64K X 64 SYNCHRONOUS PIPELINED BURST CMOS SRAM
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PIN CONFIGURATION
AD V# A D S P# ADSC# BW4# GW # B W E# V C CQ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 40 39 58 59 60 62 61 63 64 41 42 44 43 45 46 47 49 48 50 51 52 53 54 56 55 57 BW5# BW3# BW1# BW2# VC C VSS V S SQ BW7# BW8# BW6# CE1# VC C VSS CE3#
OE #
CLK
C E2 NC 126
NC 125
127 128
119 120
123 124
122
121
117 118
116
115
114
113
111 112
109 110
108
106 107
104 105
103 V C CQ I/O32 I/O31 I/O30 I/O29 I/O28 I/O27 I/O26 I/O25 I/O24 I/O23 I/O22 V S SQ V C CQ I/O21 I/O20 I/O19 I/O18 I/O17 I/O16 I/O15 I/O14 I/O13 I/O12 V S SQ V C CQ I/O11 I/O10 I/O9 I/O8 I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 V S SQ
V S SQ I/O33 I/O34 I/O35 I/O36 I/O37 I/O38 I/O39 I/O40 I/O41 I/O42 I/O43 V C CQ V S SQ I/O44 I/O45 I/O46 I/O47 I/O48 I/O49 I/O50 I/O51 I/O52 I/O53 V C CQ V S SQ I/O54 I/O55 I/O56 I/O57 I/O58 I/O59 I/O60 I/O61 I/O62 I/O63 I/O64 V C CQ
102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86
UT6164C64A
85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
A15 M OD E
NC
V C CQ ZZ A0
A2 VSS
A4 A5 A6 A7
VC C A13
NC
A1
A12 VSS
A9 A10 A11
VC C A3
____________________________________________________________________________________________________________ UTRON TECHNOLOGY INC. P80003 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
V S SQ
A14
A8
3
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