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Details, datasheet, quote on part number:UT6264CPC-70E
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| Part: | UT6264CPC-70E |
| Category: | Memory => SRAM => Async. SRAM => Low Speed & Low Power |
| Description: | Org. = 8Kx8 @ ;; Temp. ( J) = 0~70 ;; Voltage = 4.5~5.5V ;; Speed (ns) = 35/70 ;; Icc(Max) (mA) = 40/30 ;; Isb1(Max) (uA) = 5/100/50 ;; Package = 28PDIP, 28SOP, Die |
| Company: | Utron technology |
| Datasheet: | Download UT6264CPC-70E datasheet File size : 135 kB |
| Request For quote: | Find where to buy UT6264CPC-70E
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Datasheet text preview:
UTRON
Rev. 1.4
UT6264C
8K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
REVISION Preliminary Rev. 0.1 Rev. 1.0 Rev. 1.1 DESCRIPTION Original. Revised - The timeing waveforms add CE2 control pin Revised - Package outline dimension - Waveform. Revised - Improve IDR from 20µA to 10µA (LL-version , max.) - 28-pin PDIP package outline dimension 1. Add Extended temperature : -20¢J ~85¢J 2. Revised Operating : 45/30 mA (typ.) 40/30 mA (typ.) 3. Revised CMOS Standby : 2 0.3mA (typ.) normal 4. Revised DC characteristics : a. Icc(-35) : 45 40mA (typ.), 60 50 mA (max) b. Icc(-70) : 45 40mA (max.) c. Icc1(Tcycle=1us)= 10mA(max.) d. Icc2(Tcycle=500ns)=20mA(max.) 5. Revised "Order information" : add Extended parts Add order information for lead free product Date May 3 ,2001 Jun.4,2001 Jan 15,2002
Rev. 1.2
May 14,2002
Rev. 1.3
Jul 30,2002
Rev. 1.4
May 15,2003
UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
P80028
1
UTRON
Rev. 1.4
UT6264C
8K X 8 BIT LOW POWER CMOS SRAM GENERAL DESCRIPTION
The UT6264C is a 65,536-bit low power CMOS static random access memory organized as 8,192 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. Easy memory expansion is provided by using two chip enable input.( CE ,CE2) ,and supports low data retention voltage for battery back-up operation with low data retention current. The UT6264C operates from a single 4.5V~5.5V power supply and all inputs and outputs are fully TTL compatible.
FEATURES
Access time : 35/70ns (max.) Low power consumption : Operating : 40/30 mA (typ.) CMOS Standby : 0.3mA (typ.) normal 2 µA (typ.) L-version 1 µA (typ.) LL-version Single 4.5V~5.5V power supply Operating temperature : Commercial : 0¢J ~70¢J Extended : -20¢J ~85¢J All inputs and outputs TTL compatible Fully static operation Three state outputs Data retention voltage : 2V (min.) Package : 28-pin 600 mil PDIP 28-pin 330 mil SOP
PIN CONFIGURATION
NC A12 A7 1 2 3 4 28 27 26 25 Vcc
WE
FUNCTIONAL BLOCK DIAGRAM
A0-A12 DECODER 8K X 8 MEMORY ARRAY
CE2 A8 A9 A11
OE
A6 A5 A4 A3 A2 A1 A0
UT6264C
5 6 7 8 9 10 11 12 13 14
24 23 22 21 20 19 18 17 16 15
Vcc Vss
A10
CE
I/O8 I/O7 I/O6 I/O5 I/O4
I/O1-I/O8
I/O DATA CIRCUIT
COLUMN I/O
I/O1 I/O2 I/O3 Vss
PDIP/SOP
CE CE2
OE
PIN DESCRIPTION
CONTROL CIRCUIT
WE
SYMBOL A0 - A12 I/O1 - I/O8 CE ,CE2 WE OE VCC VSS NC
DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Inputs Write Enable Input Output Enable Input Power Supply Ground No connection
UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
P80028
2
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