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Part: UT62L2568LCL-70LI
Category:
Memory
-> SRAM
-> Async. SRAM
-> Low Speed & Low Power
Description:
Company: Utron technology
Datasheet: Download UT62L2568LCL-70LI datasheet File size : 144 kB
Request For quote: Find where to buy UT62L2568LCL-70LI
Datasheet text preview:
UTRON
Rev. 1.1
256K X 8 BIT LOW POWER CMOS SRAM
UT62L2568(I)
REVISION HISTORY
REVISION Preliminary Rev. 0.1 Rev. 1.0 DESCRIPTION Original. 1.Add fast access time : 100ns 2.Revise "FEATURES" Operating : 40/25 40/35/25mA (Icc max.) 3.Revise "FEATURES" Standby : L -version : TA=0¢J ~50¢J ,20 uA(max.) 20 uA(TYP.) LL-version : TA=0¢J ~50¢J , 3 uA(max.) 2 uA(TYP.) 4.Revise 36 TFBGA Outline Dimension ball size : 0.3mm 0.35mm 1.Revised "FEATURES" Operating current : 40/35/25mA(ICC max) 20/18/15mA (ICC typ.) 2.TRUTH TABLE & DC ELECTRICAL : Delete ISB2 3.Revised VTERM : -0.5 to Vcc+0.3V -0.5 to 4.6V 4.Added VOH : 2.7V at Vcc=3.0V 5.Revised DC (ICC max) 45/35/25mA 35/30/25mA (ICC typ.) 30/25/20mA 20/18/15mA 6.Add under/overshoot range of VIL & VIH 7.Revised AC tOHZ*@100ns (max): 35ns 30ns tWHZ*(max) :30/30/40 20/25/30ns 8.Revised "Data retention Characteristics" : IDR-LL (Typ.) : NA 1uA, IDR-L (Typ.) : NA 10uA IDR-LL (Max.) : 25uA 6uA tR(min) : 5ns "tRC" 9.Add order information for lead free product Release Date Nov 28, 2001 Aug 30, 2002
Rev. 1.1
Apr 28, 2003
UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
P80082
1
UTRON
Rev. 1.1
256K X 8 BIT LOW POWER CMOS SRAM GENERAL DESCRIPTION
UT62L2568(I)
FEATURES
Fast access time : 55ns(max.) for Vcc=2.7V~3.6V 70/100ns(max.) for Vcc=2.5V~3.6V CMOS low power operation Operating : 20/18/15mA (TYP.) Standby : 20 uA(TYP.) L -version 2 uA(TYP.) LL-version Single 2.5V~3.6V power supply Operating temperature: Industrial : -40¢J ~85¢J All TTL compatible inputs and outputs Fully static operation Three state outputs Data retention voltage: 1.5V (min) Package : 32-pin 8mm x 20mm TSOP-¢¹ 32-pin 8mm x 13.4mm STSOP 36-pin 6mm × 8mm TFBGA
The UT62L2568(I) is a 2,097,152-bit low power CMOS static random access memory organized as 262,144 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. The UT62L2568(I) is designed for very low power system applications. It is particularly well suited for battery back-up nonvolatile memory applications. It operates from a wide range of 2.5V~ 3.6V supply voltage. Easy memory expansion is provided by using two chip enable input ( CE ,CE2). And all inputs and three-state outputs are fully TTL compatible.
FUNCTIONAL BLOCK DIAGRAM
2 5 6 K ¡Ñ 8 MEMORY AR RAY
A 0 -A 1 7
DECODER
Vcc Vss
I / O 1 -I / O 8
I/O DATA C IR C U IT
C O L U M N I/O
CE CE2 OE WE
CO NTROL C IR C U IT
UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
P80082
2
UTRON
Rev. 1.1
256K X 8 BIT LOW POWER CMOS SRAM
UT62L2568(I)
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
PIN CONFIGURATION
A11 A9 A8 A13 WE CE2 A15 Vcc A17 A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A10 I/O8 I/O7 I/O6 I/O5 I/O4 Vss I/O3 I/O2 I/O1 A0 A1 A2 A3
OE
CE
A B C D E F G H
A0 I/O 5 I/O 6 V ss V cc I/O 7 I/O 8 A9
A1 A2
CE2
WE
A3 A4 A5
A6 A7
A8 I/O 1 I/O 2 V cc V ss
NC
UT62L2568(I)
NC
OE
A17 A16 A12 A15 A13
I/O 3 I/O 4 A14
CE A11
A10
TSOP-1 / STSOP
1 2 3 4 5 6
TFBGA
PIN DESCRIPTION
SYMBOL A0 - A17 I/O1 - I/O8 CE ,CE2
WE OE VCC VSS NC
DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Inputs Write Enable Input Output Enable Input Power Supply Ground No Connection
UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
P80082
3
Others parts begin by ut
UT-1 UT-2 UT-3 UT-4 UT-5 UT-6 UT-7 UT-8 UT-9 UT-10 UT-11
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