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Details, datasheet, quote on part number:UT62L5128LS-55L
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| Part: | UT62L5128LS-55L |
| Category: | Memory => SRAM => Async. SRAM => Low Speed & Low Power |
| Description: | Org. = 512Kx8 ;; Temp. ( J) = 0~70 ;; Voltage = 2.7~3.6V ;; Speed (ns) = 55/70/100 ;; Icc (Max) (mA) = 40/30/25 ;; Isb1(Max) (uA) = 80/20 ;; Package = 32SOP, 32TSOP-I, 32STSOP, 36TFBGA |
| Company: | Utron technology |
| Datasheet: | Download UT62L5128LS-55L datasheet File size : 125 kB |
| Request For quote: | Find where to buy UT62L5128LS-55L
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Datasheet text preview:
UTRON
Rev. 1.4
512K X 8 BIT LOW POWER CMOS SRAM
UT62L5128
REVISION HISTORY
REVISION Preliminary Rev. 0.5 Rev. 1.0 Released DATE Mar, 2001 Jun 21,2001 1. The symbols CE# and OE# and WE# are revised as. CE and OE and WE . 2. Separate Industrial and Consumer SPEC. 3. Add access time 55ns range. Aug 3,2001 Add STSOP package Mar 25,2002 Add SOP package 1. Revised 36-pin TFBGA package outline dimension”G a”B Rev. 1.2 : ball diameter=0.3mm May 3,2002 b”B Rev. 1.3 : ball diameter=0.35mm 2. Revised DC ELECTRICAL CHARACTERISTICS”G c”B Revised VIH as 2.2V 1. Revised Operation surrent : -Icc(max) 45/35/25mA 40/30/25mA -Icc(Typ) 30/25/20mA 30/20/16mA 2. Revised Standby current : 20/3uA 20/2uA 3. Revised VOH(Typ) : NA 2.7V May 8,2003 4. Add VIH(max)=VCC+2.0V for pulse width less than 10ns. VIL(min)=VSS-2.0V for pulse width less than 10ns. 5. Revised AC Table tOHZ* characteristics 6. Add order information for lead free product DESCRIPTION Original.
Rev. 1.1 Rev. 1.2
Rev. 1.3
Rev. 1.4
UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
P80051
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UTRON
Rev. 1.4
512K X 8 BIT LOW POWER CMOS SRAM GENERAL DESCRIPTION
The UT62L5128 is a 4,194,304-bit low power CMOS static random access memory organized as 524,288 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology. The UT62L5128 operates from a wide range 2.7V~3.6V power supply and supports extended operating temperature range. The UT62L5128 is designed for high density and low power memory applications. The device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 1.5V.
UT62L5128
FEATURES
Fast Access time : 55/70/100ns CMOS Low power operating Operating current : 40/30/25mA (Icc max.) Standby current : 20µA (typ.) L-version 2µA (typ.) LL-version Single 2.7V~3.6V power supply Operating Temperature : Commercial : 0¢J ~70¢J Extended : -20¢J ~80¢J All inputs and outputs TTL compatible Fully static operation Three state outputs Data retention voltage : 1.5V (min) Package : 32-pin 450 mil SOP 32-pin 8mm × 20mm TSOP-¢¹ 32-pin 8mm × 13.4mm STSOP 36-pin 6mm × 8mm TFBGA
FUNCTIONAL BLOCK DIAGRAM
512K ”Ń 8 MEMORY ARRAY
A0-A18
DECODER
Vcc Vss
I/O1-I/O8
I/O DATA CIRCUIT
COLUMN I/O
CE
OE WE
CONTROL CIRCUIT
UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
P80051
2
UTRON
Rev. 1.4
512K X 8 BIT LOW POWER CMOS SRAM
UT62L5128
PIN CONFIGURATION
A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Vcc A15 A17 WE A13 A8 A9 A11 OE A10 CE I/O8 I/O7 I/O6 I/O5 I/O4
A B C D E F G H
A0 I/O5 I/O6 Vss Vcc I/O7 I/O8 A9
A1 A2
NC WE NC
A3 A4 A5
A6 A7
A8 I/O1 I/O2 Vcc Vss
A17 OE A10 CE A11
A18 A16 A12 A15 A13
I/O3 I/O4 A14
SOP
1 2 3 4 5 6
TFBGA
A11 A9 A8 A13 WE A17 A15 Vcc A18 A16 A14 A12 A7 A6 A5 A4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 TSOP-1 / STSOP
OE A10 CE I/O8 I/O7 I/O6 I/O5 I/O4 Vss I/O3 I/O2 I/O1 A0 A1 A2 A3
PIN DESCRIPTION
SYMBOL A0 - A18 I/O1 - I/O8 CE
WE OE Vcc Vss NC
DESCRIPTION Address Inputs Data Inputs/Outputs Chip Enable Input Write Enable Input Output Enable Input Power Supply Ground No Connection
UTRON TECHNOLOGY INC. 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919
P80051
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