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Details, datasheet, quote on part number:VSC7940
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| Part: | VSC7940 |
| Category: | Optoelectronics => Drivers/Controllers => Laser => Laser Diodes->Modulator Drivers |
| Description: | 3.125Gb/s Laser Driver |
| Company: | Vitesse Semiconductor Corp. |
| Datasheet: | Download VSC7940 datasheet File size : 157 kB |
| Request For quote: | Find where to buy VSC7940
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Datasheet text preview:
VSC7940 Data Sheet
SONET/SDH 3.125Gb/s Laser Diode Driver with Automatic Power Control
FEATURES
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APPLICATIONS
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Power Supply: 5V ±5% DC-Coupled to Laser Diode Programmable Modulation Current: 5mA to 100mA Programmable Bias Current: 2mA to 100mA Typical Rise/Fall Time of 60ps Enable/Disable Control Automatic Optical Average Power Control Modulation and Bias Current Monitors
SONET/SDH at 155Mb/s, 622Mb/s, 1.244Gb/s, 2.488Gb/s, and 3.125Gb/s Full-Speed Fibre Channel (1.062Gb/s, 2.124Gb/s) OC-3, OC-12, OC-48 Modules SFF/SEP Modules CWDM Modules DWDM Modules
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GENERAL DESCRIPTION
The VSC7940 is a single +5V supply laser diode driver for SONET/SDH applications up to 3.125Gb/s. External resistors set a wide range of bias and modulation currents for driving the laser. Data and clock inputs accept differential PECL signals. The Automatic Power Control (APC) loop maintains a constant average optical power over temperature and lifetime. The dominant pole of the APC loop can be controlled with an external capacitor. Other features include enable/disable control, and failure-monitor output to indicate when the APC loop is unable to maintain the average optical power. The VSC7940 is available in die form or in a 32-pin TQFP package.
VSC7940 Block Diagram
VCC
L AT C H
VSC7940
MUX DATA+ D DATACLK+ CLKCLR Q SET Q
IOUT+ IOUT-
CF RF VCC
BIAS
VCC VCC
MODMON
ENABLE DISABLE
BIASMON APC MD FAIL MODSET BIASMAX CAPC APCSET
G52357, Rev 4.0 4/17/02
© VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com Internet: www.vitesse.com
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VSC7940 Data Sheet
SPECIFICATIONS
TA = +25°C. Typical values are for VCC = +5V operation.
Table 1. DC Specifications
Symbol I CC Parameter Power Supply Current Min Typ 55 Max 70 Unit mA Condition RMODSET = 7.3k, RBIASMAX = 4.8k, IBIAS and IMOD excluded, VCC = +5V, unlatched IMOD = 100mA, IBIAS = 100mA included, VCC = +5.25V, +85°C, latched Voltage at BIAS pin = (VCC - 1.6) ENABLE = LOW or DISABLE= HIGH(1) APC open loop. IBIAS = 100mA APC open loop. IBIAS = 2mA Refers to part to part variation VRMD = VCC - VMD APC closed loop IMD = 1mA(2) IMD = 18µA(2) Refers to part-to-part variation ENABLE = LOW or DISABLE = HIGH(1) See Note 2 IMOD = 100mA IMOD = 5mA IBIAS/IBIASMON IMOD/IMODMON
ICC_MAX IBIAS IBIAS_OFF SBIAS BIASAA VRMD IMD SMD_BIAS MDAA I M OD IMOD_OFF MODAA S M OD ABIAS A M OD
Maxium Power Supply Current Bias Current Range Bias Off Current Bias Current Stability Bias Current Absolute Accuracy Monitor Diode Reverse Bias Voltage Monitor Diode Reverse Current Range Monitor Diode Bias Setpoint Stability Monitor Diode Bias Absolute Accuracy Modulation Current Range Modulation Off Current Modulation Current Absolute Accuracy Modulation Current Stability BIASMON to IBIAS Gain MODMON to IMON Gain -15 -4 8 0 -15 1.5 18 -4 8 0 -15 5 2
305 100 100 230 900 +1 5 1000 -5 0 90 +1 5 100 200 +1 5 -5 0 250 37 29 +480 +480
mA mA µA ppm/°C % V µA ppm/°C % mA µA % ppm/°C A/A A/A
1. Both IBIAS and IMOD will turn off if MODSET or BIASMAX are grounded. 2. Assumes laser diode to monitor diode transfer function does not change with temperature.
Table 2. AC Specifications
Symbol tSU tH tDEN tR, tF PWD CIDMAX tJ JTOT Parameter Input Latch Setup Time Input Latch Hold Time Enable/Star t-up Delay Output Rise and Fall Time Pulse Width Distortion Maximum Consecutive Identical Digits Jitter Generation Total Jitter 80 7 20 20 40 Mi n 100 100 250 60 10 80 50 Typ Max Unit ps ps ns ps ps bits psp-p psp-p 0-1 pattern PRBS23-1 pattern, IMOD = 100mA 20% to 80%, IMOD = 100mA See Notes 1, 2 Condition LATCH = HIGH LATCH = HIGH
1. Measured with 622Mb/s 0-1 pattern, LATCH = HIGH. 2. PWD = (wider pulse - narrower pulse) / 2.
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G52357, Rev 4.0 4/17/02
VSC7940 Data Sheet
Table 3. PECL and TTL/CMOS Inputs/Outputs
Symbol VID VICM IIN VIH VIL Parameter Differential Input Voltage Common-Mode Input Voltage Clock and Data Input Current TTL Input HIGH Voltage (ENABLE, DISABLE, LATCH) TTL Input LOW Voltage (ENABLE, DISABLE, LATCH) TTL Output HIGH Voltage (FAIL) TTL Output LOW Voltage (FAIL) 2.4 VCC - 0.3 2.0 0.8 VCC 0.44 V V V V Sourcing 50µA Sinking 100µA Min 100 VCC -1.49 VCC -1.32 Typ Max 1600 VCC -VID/4 10 Unit mVp-p V Condition (DATA+)-(DATA-) PECL-compatible
µA
Table 4. ENABLE/DISABLE Truth Table
ENAB LE Floating Floating Floating HI G H HI GH HI GH LOW LOW LOW DI SABL E Floating HIGH LOW Floating HIGH LOW Floating HIGH LOW Output Currents Of f Of f On Of f Of f On Of f Of f Of f
Table 5. LATCH Truth Table
LATCH Floating HIGH LOW Mode Clocked Clocked Bypass
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G52357, Rev 4.0 4/17/02
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