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Part: VSC7961
Category:
Communication
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-> Ethernet/DS1/E1 (T1/E1)
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-> Limiting Post Amplifiers
Description: 3.125 Gb/s Limiting Amp (PECL) With Los
Company: Vitesse Semiconductor Corp.
Datasheet: Download VSC7961 datasheet File size : 427 kB
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Datasheet text preview:
VSC7961 Data Sheet
3.125Gb/s PECL Limiting Amplifier with LOS Detect
FEATURES
G G G G G G G G
APPLICATIONS
G
+3.3V or +5V Power Supply Typical Supply Current of 31mA Positive Emitter-Coupled Logic Outputs Optional Output Squelch Loss of Signal Detect Output Offset Correction Typical Rise/Fall Times of Faster than 100ps TSSOP-16 and 24-Pin QFP-N Package, and Bare Dice
SONET/SDH at 155Mb/s, 622Mb/s, 1.244Gb/s, 2.488Gb/s, and 3.125Gb/s Full-Speed Fibre Channel (1.062Gb/s/2.124Gb/s) Small Form Factor Receivers ATM Optical Receivers
G G G
GENERAL DESCRIPTION
The VSC7961 is a single-supply limiting amplifier with Loss of Signal (LOS) detect for SONET/SDH and Fibre Channel applications up to 3.125Gb/s. The VSC7961 provides a constant output signal swing for a wide range of input voltages and has positive emitter-coupled logic (PECL) outputs. The VSC7959 provides the same functionality as the VSC7961 with current-mode logic (CML) outputs. Key features of the VSC7961 are its rms power detectors for programmable LOS detection, optional output squelch, excellent jitter performance, and fast edge rates. The VSC7961 is available in die form, a TSSOP-16 package, or a 24-pin QFP-N package.
VSC7961 Block Diagram
VSC7961
VCC 8k VCC TH RTH rms Power Detect and Control 0.01µF 0.01µF IN+ IN100 SQUELCH Output Control LEVEL OUT+ OUT50 Lowpass Filter 10pF 50 VCC - 2V Offset Correction CZ1 0.1µF
G52360, Rev 4.0 5/15/03 © VITESSE SEMICONDUCTOR CORPORATION · 741 Calle Plano · Camarillo, CA 93012 Tel: (800) VITESSE · FAX: (805) 987-5896 · Email: prodinfo@vitesse.com Internet: www.vitesse.com
LOS
8k
LOS VCC
VCC - 2V
CZ2
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VSC7961 Data Sheet
SPECIFICATIONS
Over Recommended Operating Conditions. Table 1. DC Specifications
Symbol VCC IEE Parameter Power Supply Voltage Power Supply Current(1) Min 3.135 31 35 ICC Power Supply Current Including Load Current(1) Power Supply Current When Squelched(1) Power Supply Current Including Load Current When Squelched(1) Squelch Input Current Power Supply Rejection Ratio 0 20 59 62 23 30 62 67 Typ Max 5.5 37 43 67 72 30 35 72 75 400 Units V mA mA mA mA mA mA mA mA µA dB f < 2MHz, VIN = 100mV VCC = 3.3V VCC = 5V VCC = 3.3V VCC = 5V VCC = 3.3V VCC = 5V VCC = 3.3V VCC = 5V Condition
IEESQ
ICCSQ
ISQ PSRR
1. See Figure 1 for supply current measurement setup.
All AC voltage measurements are differential peak-to-peak, unless otherwise specified. Table 2. AC Specifications
Symbol Parameter Data Rate VIN JD Input Voltage Range Deterministic Jitter(1) 50 JR Random Jitter(2) 11 tR, tF Rise and Fall Times 90 140 VN RDIFF fL Input Referred Noise Differential Input Resistance Low Frequency Cutoff 100 2 2 VSQ VOH Output Signal When Squelched PECL Output HIGH Voltage VCC 0.105 40 VCC 0.85 VCC 0.85 VOL PECL Output LOW Voltage VCC 1.81 VCC 1.47 VCC 0.95
1. Deter ministic jitter measured peak-to-peak with K28.5 pattern. 2. Random jitter measured with minimum input.
Mi n 3.125 5
Typ
Max
Units Gb/s
Condition
1200 35
mV ps ps VIN >10mV. VIN = 5mV, VCC = +3.3V. rms, VIN > 10mV. VIN = 5mV, VCC = +3.3V. 20% to 80%, VIN >10mV. 20% to 80%, VIN = 5mV, VCC = +3.3V. rms, IN+ to IN. IN+ to IN. CZ open. CZ = 0.1µF. Output AC-coupled. Tested at 3.3V. Tested at 3.3V. Squelched. Tested at 3.3V. Tested at 3.3V. Squelched.
9
ps ps
120
ps ps
230
µV M Hz kHz mV V V V V
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G52360, Rev 4.0 5/15/03
VSC7961 Data Sheet
Table 3. Loss of Signal Specifications
Symbol HLOS tLOS VTHA VTHD VLOSH VLOSL Parameter LOS Hystersis LOS Assert/Deassert Time LOS Assert Threshold LOS Deassert Threshold LOS Output HIGH Voltage LOS Output LOW Voltage 2.4 3.5 0.3 15 35 Mi n 2.2 Typ 4.0 1.0 Max 5.5 Units dB µs mV mV V V Condition HLOS = 20 log (VTHD/VTHA) K28.5 pattern. Response time for a 10dB change in input power. RTH = 5.6k, f = 2.5Gb/s, K28.5 pattern RTH = 5.6k, f = 2.5Gb/s, K28.5 pattern. ILOS = 30µA. ILOS = 1.2mA.
Table 4. Loss of Signal Truth Table
SQ UEL C H HI GH LOW HI GH LOW L OS LOW HIGH HIGH LOW Output On On Of f On
Table 5. Recommended Operating Conditions
Symbol VCC T Parameter Power Supply Voltage Operating Temperature Range Under Bias(1) Min +3.3 40 Typ Max +5 +8 5 Units V °C Condition
1. Lower limit of specification is ambient temperature and upper limit is case temperature.
Table 6. Absolute Maximum Ratings
Symbol VCC Parameter Power Supply Voltage Voltage at IN+, IN Voltage at SQUELCH, LOS, LOS, TH, LEVEL Differential Input Voltage (IN+, IN) Continuous Current at PECL Outputs (OUT+, OUT) Current into LOS, LOS TJ TS VESD Junction Temperature Storage Temperature ESD Voltage (Human Body Model) 2 55 55 Min 0.5 VCC 3 0.5 Max +6 VCC + 0.5 VCC + 0.5 2.5 25 +3 +125 +150 2500 Units V V V V mA mA °C °C V Condition
Stresses listed under Absolute Maximum Ratings may be applied to devices one at a time without causing permanent damage. Functionality at or above the values listed is not implied. Exposure to these values for extended periods may affect device reliability.
ELECTROSTATIC DISCHARGE
This device can be damaged by ESD. Vitesse recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures may adversely affect reliability of the device.
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G52360, Rev 4.0 5/15/03
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