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Details, datasheet, quote on part number:WT6014
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| Part: | WT6014 |
| Category: | Microcontrollers |
| Description: | Micro-controllers For Monitors Provide Selection in a Range of ROM/ram Size (max. ROM Size 16KBytes, RAM 288Bytes) |
| Company: | Weltrend |
| Datasheet: | Download WT6014 datasheet File size : 447 kB |
| Request For quote: | Find where to buy WT6014
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Datasheet text preview:
WT6014
Digital Monitor Controller
Ver. 1.21 Jul-31-1998
GENERAL DESCRIPTION
The WT6014 is a member of WT60XX microcontroller family. It is specially designed for digital controlled multi-sync monitor. It contains 8-bit CPU, 4K bytes ROM, 128 bytes RAM, 14 PWMs, parallel I/O, SYNC processor, timer, DDC interface (slave mode I2C interface with DDC1), and watch-dog timer.
FEATURES
* 8-bit 6502 compatible CPU, 4MHz operating frequency * 4096 bytes ROM, 128 bytes SRAM * 8MHz crystal oscillator * 14 channels 8-bit/62.5kHz PWM outputs (8 open drain outputs & 6 CMOS outputs) * Sync signal processor with sync separation, frequency calculation, H/V polarity detection control * DDC interface supports VESA DDC1/DDC2B standard * Watch-dog timer (0.524 second) * Maximum 22 programmable I/O pins * One 8-bit programmable timer * One external interrupt request * Built-in low VDD voltage reset * Single +5V power supply
PIN ASSIGNMENT
40-Pin PDIP
DA2 DA1 DA0 RESET VDD GND OSCO OSCI PB5 PB4 PB3 PB2 PB1 PB0 IRQ PC7 PC6 PC5 PC4 PC3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VSYNC HSYNC DA3 DA4 DA5 DA6 DA7 PA7/HSO PA6/VSO PA5/DA13 PA4/DA12 PA3/DA11 PA2/DA10 PA1/DA9 PA0/DA8 SCL SDA PC0 PC1 PC2 GND OSCO OSCI PB5 PB4 PB3 PB2 PB1 PB0 IRQ PC7 PC6 PC5 PC4 PC3 DA2 DA1 DA0 RESET VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
42-Pin SDIP
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 DA6 DA7 PA7/HSO PA6/VSO PA5/DA13 PA4/DA12 PA3/DA11 PA2/DA10 PA1/DA9 PA0/DA8 SCL SDA PC0 PC1 PC2 VSYNC HSYNC DA3 DA4 DA5
* I2C is a trademark of Philips Corporation. * DDC is a trademark of Video Electronics Standard Association (VESA).
Weltrend Semiconductor, Inc.
1
WT6014
Digital Monitor Controller
Ver. 1.21 Jul-31-1998
PIN DESCRIPTION
Pin No. 40 42
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 1 2 3 4 5 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 38 39 40 41 42
Pin Name
DA2 DA1 DA0 /RESET VDD GND OSCO OSCI PB5 PB4 PB3 PB2 PB1 PB0 /IRQ PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 SDA SCL PA0/DA8 PA1/DA9 PA2/DA10 PA3/DA11 PA4/DA12 PA5/DA13 PA6/VSO PA7/HSO DA7 DA6 DA5 DA4 DA3 HSYNC VSYNC
I/O
O O O I
Descriptions
D/A converter 2. Open-drain output. External applied voltage can up to 10V. D/A converter 1. Open-drain output. External applied voltage can up to 10V. D/A converter 0. Open-drain output. External applied voltage can up to 10V. Reset. Active low. Schmitt trigger input, Internal pull high. Power supply (+5V). Ground (0V). Oscillator Output. Connects a 8MHz crystal. Oscillator Input. Connects a 8MHz crystal. I/O Port B5. When it is an input pin, it has an internal pull-up resistor. When it is an output pin, the sink current is 5mA and the source current is 5mA. I/O Port B4. Same as PB5. I/O Port B3. Same as PB5. I/O Port B2. Same as PB5. I/O Port B1. Same as PB5. I/O Port B0. Same as PB5. Interrupt Request . It has an internal pull high resistor. I/O Port C7. When it is an input pin, it has an internal pull-up resistor. When it is an output pin, the sink current is 10mA and the source current is 5mA. I/O Port C6. Same as PC7. I/O Port C5. Same as PC7. I/O Port C4. Same as PC7. I/O Port C3. Same as PC7. I/O Port C2. Same as PC7. I/O Port C1. Same as PC7. I/O Port C0. Same as PC7. DDC serial data. DDC serial clock. I/O Port A0 or D/A converter 8. This pin can be the output of D/A converter 8 (source/sink = 5mA) or an I/O pin (source = -100uA, sink = 5mA). I/O Port A1 or D/A converter 9. Same as PA0/DA8. I/O Port A2 or D/A converter 10. Same as PA0/DA8. I/O Port A3 or D/A converter 11. Same as PA0/DA8. I/O Port A4 or D/A converter 12. Same as PA0/DA8. I/O Port A5 or D/A converter 13. Same as PA0/DA8. I/O Port A6 / VSYNC OUT. This pin can be the output of VSYNC or an I/O pin. When as an I/O pin, it is same as PA0. I/O Port A7 / HSYNC OUT. This pin can be the output of HSYNC or an I/O pin. When as an I/O pin, it is same as PA0. D/A converter 7. Open-drain output. External applied voltage can up to 10V. D/A converter 6. Open-drain output. External applied voltage can up to 10V. D/A converter 5. Open-drain output. External applied voltage can up to 10V. D/A converter 4. Open-drain output. External applied voltage can up to 10V. D/A converter 3. Open-drain output. External applied voltage can up to 10V. HSYNC input. Schmitt trigger input. VSYNC input. Schmitt trigger input.
O I I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O O O O O O I I
Weltrend Semiconductor, Inc.
2
WT6014
Digital Monitor Controller
Ver. 1.21 Jul-31-1998
FUNCTIONAL DESCRIPTION
CPU
The CPU core is 6502 compatible, operating frequency is 4MHz. Address bus is 16-bit and data bus is 8-bit. the non-maskable interrupt (/NMI) of 6502 is changed to maskable interrupt and is defined as the INT0. The interrupt request (/IRQ) of 6502 is defined as the INT1. The initial stack pointer is 00FFH, because page 1 and page 0 are mapped to same area. Please refer the 6502 reference menu for more detail.
ROM
4096 bytes maskable ROM is provided for program codes. Address is located from F000H to FFFFH. The following addresses are reserved for special purpose : FFFAH (low byte) and FFFBH (high byte) : INT0 interrupt vector. FFFCH (low byte) and FFFDH (high byte) : program reset vector. FFFEH (low byte) and FFFFH (high byte) : INT1 interrupt vector.
RAM
Built-in 128 bytes SRAM, address is located from 0080H to 00FFH
0000H : REGISTERS 001CH 001DH : Reserved 007FH 0080H : RAM 00FFH 0100H : Page 1 mapped to Page 0 01FFH 0200H : EFFFH F000H : : : FFFFH Reserved
ROM
Low VDD Voltage Reset
A VDD voltage detector is built inside the chip. When VDD is below 4.0 volts, the whole chip will be reset just like power-on-reset. Note that the 4.0 volts varies with temperature and process. Please refer the electrical characteristics.
Weltrend Semiconductor, Inc.
3
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