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Details, datasheet, quote on part number:W24512AJT
 
 
Part:W24512AJT
Category:Memory => SRAM => Async. SRAM => 512 Kb
Description:64kx8, 512k, 5v, 15, 32, J:soj/ T:tsop
Company:Winbond Electronics Corp America
Datasheet:Download W24512AJT datasheet   File size : 189 kB
Request For quote:  Find where to buy W24512AJT
 



Datasheet text preview:
W24512A 64K × 8 HIGH SPEED CMOS STATIC RAM
GENERAL DESCRIPTION
The W24512A is a high speed, low power CMOS static RAM organized as 65536 × 8 bits that operates on a single 5-volt power supply. This device is manufactured using Winbond's high performance CMOS technology.
FEATURES
· ·
High speed access time: 15/20/25/35 nS (max.) Low power consumption: - Active: 500 mW (typ.) Single +5V power supply Fully static operation
· · ·
All inputs and outputs directly TTL compatible Three-state outputs Available packages: 32-pin 300 mil SOJ, skinny DIP, 450 mil SOP, and standard type one TSOP
· ·
PIN CONFIGURATIONS
BLOCK DIAGRAM
V DD
NC NC A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 VSS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
V DD A15 CS2 WE A13 A8 A9 A11 OE A1 0 CS1 I/O8 I/O7 I/O6 I/O5 I/O4
V SS A0 . . A15
DECODER
CORE C O RE ARRAY
CS2 CS1 OE WE
CONTROL
DATA I/O
I/O1 . . I/O8
PIN DESCRIPTION
SYMBOL A0-A15 I/O1-I/O8 CS1 , CS2 WE OE VDD VSS NC DESCRIPTION Address Inputs Data Inputs/Outputs Chip Select Inputs Write Enable Input Output Enable Input Power Supply Ground No Connection
A11 A9 A8 A13 WE CS2 A15 V DD NC NC A14 A12 A7 A6 A5 A4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32-pin TSOP
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
OE A10 CS1 I/O8 I/O7 I/O6 I/O5 I/O4 V SS I/O3 I/O2 I/O1 A0 A1 A2 A3
-1-
Publication Release Date: March 1999 Revision A7
W24512A
TRUTH TABLE
CS1 H X L L L CS2 X L H H H OE X X H L X WE X X H H L MODE Not Selected Not Selected Output Disable Read Write I/O1- I/O8 High Z High Z High Z Data Out Data In VDD CURRENT ISB, ISB1 ISB, ISB1 I DD I DD I DD
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER Supply Voltage to VSS Potential Input/Output to VSS Potential Allowable Power Dissipation Storage Temperature Operating Temperature RATING -0.5 to +7.0 -0.5 to VDD +0.5 1.0 -65 to +150 0 to +70 UNIT V V W °C °C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
Operating Characteristics
(VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C)
PARAMETER Input Low Voltage Input High Voltage Input Leakage Current Output Leakage Current Output Low Voltage Output High Voltage Operating Power Supply Current
SYM. VIL VIH ILI ILO
TEST CONDITIONS VIN = VSS to VDD VI/O = VSS to VDD CS1 = VIH or CS2 = VIL or OE = VIH or WE = VIL IOL = +8.0 mA IOH = -4.0 mA 15 CS1 = VIL, CS2 = VIH I/O = 0 mA, Cycle = min. Duty = 100% 20 25 35
MIN. -0.5 +2.2 -10 -10
TYP. -
MAX. +0.8 VDD +0.5 +10 +10
UNIT V V µA µA
VOL VO H I DD
2.4 -
-
0.4 200 160 160 140 30 10
V V mA
Standby Power Supply Current
ISB ISB1
CS1 = VIH or CS2 = VIL Cycle = min., Duty = 100% CS1 VDD -0.2V or CS2 0.2V
-
-
mA mA
Note: Typical characteristics are at VDD = 5V, TA = 25° C.
-2-
W24512A
CAPACITANCE
(VDD = 5V, TA = 25° C, f = 1 MHz)
PARAMETER Input Capacitance Input/Output Capacitance
SYM. CIN CI/O
CONDITIONS VIN = 0V VOUT = 0V
MAX. 8 10
UNIT pF pF
Note: These parameters are sampled but not 100% tested.
THERMAL RESISTANCE
PARAMETER Junction to Case Thermal Resistance Junction to Ambient Thermal Resistance SYM. CONDITIONS A. F. R. = 1m/sec, TA = 25° C A. F. R. = 1m/sec, TA = 25° C MAX. 20 60 UNIT °C / W °C / W
JC JA
Note: These parameters are only applied to "TSOP" and "SOJ" package types.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level Output Load 0V to 3V 5 nS 1.5V CL = 30 pF, IOH/IOL = -4 mA/8 mA CONDITIONS
AC Test Loads and Waveform
R1 480 ohm R1 480 ohm 5V OUTPUT OUTPUT 30 pF
Including Jig and Scope
5V 5 pF R2 255 ohm
Including Jig and Scope
R2 255 ohm
(For TCLZ1, TCLZ2, TOLZ, TCHZ1,TCHZ2, TOHZ, TWHZ, TOW )
3.0V
90% 10% 5 nS 10%
90%
0V
5 nS
-3-
Publication Release Date: March 1999 Revision A7