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Details, datasheet, quote on part number:W523A
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Datasheet text preview:
W523AXXX DATA SHEET
HIGH FIDELITY
GENERAL DESCRIPTION The W523Axxx family are programmable speech synthesis ICs that utilize Winbonds new high fidelity voice synthesis algorithm to generate all types of voice effects with high sound quality. The W523Axxx's LOAD, JUMP, MOVE and INC commands and ten programmable registers provide powerful user-programmable functions that make this chip suitable for an extremely wide range of speech IC applications. The W523Axxx family includes 14 kinds of part numbers with same function except for the voice duration shown below:
PART NO. Duration PART NO. Duration W523A008 8 sec. W523A040 40 sec. W523A010 10 sec. W523A050 50 sec. W523A012 12 sec. W523A060 60 sec. W523A015 15 sec. W523A070 70 sec. W523A020 20 sec. W523A080 80 sec. W523A025 25 sec. W523A100 100 sec. W523A030 30 sec. W523A120 120 sec.
PowerSpeech
TM
Note: The voice duration is estimated by various sampling rate.
FEATURES · · · · · · · Operating voltage range: 2.4 5.5 volts New high fidelity synthesis algorithm Either PWM mode or D/A converter mode can be selected for AUD output Provides 4 direct trigger inputs that can easily be extended to 24 matrix trigger inputs Two trigger input debounce times (50 mS or 400 uS) can be set Provides up to 2 LEDs and 5 STOP outputs Flexible functions programmable through the following: - LD (Load), JP (Jump), MV (Move) and INC (Increase) commands - Four general purpose registers: R0, R1, R2 and R3 - Six special purpose registers: EN0, EN1 (excludes W523A008 and W523A010), MODE0, MODE1, STOP and PAGE - Conditional instructions: @LAST, @TGn_HIGH or LOW, where, n = 1,2,5 or 6 for W523A012 ~ W523A120; n=1,2,3 or 4 for W523A008 and W523A010 - Speech equations - END instruction · · · Supports CPU interface operation Symbolic compiler supported Instruction cycle 400 µS typically
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Publication Release Date:Feb. 2002 Revision A2
W523AXXX
· Section control for - Variable frequency: 4.8/6/8/12 KHz - LED: ON/OFF · Up to 256 voice groups can be used in single page mode; or extended to 2,048 voice groups in multi page mode, such as 8-page, 16-page and 32-page.
BLOCK DIAGRAM
OSC VDD1 RESET TEST TG1 TG2 *TG5 *TG6 VSS1 LED1 CONTROLLER PWM DRIVER D/A CONVERTER SPEECH SYNTHESIZER TIMING GENERATOR ROM
*: TG3, TG4 for W523A008 and W523A010
STPA/BUSY
STPB
LED2/STPC
STPD
STPE -2-
VSS2
VDD2
SPK+/AUD
SPK-
W523AXXX
PIN DESCRIPTION NAME OSC VDD1 TEST
RESET
I/O I I I I I I I O O O O O O O O Ring oscillator input Positive power supply
DESCRIPTION
Test pin. Internally pulled low Active low to reset all devices as POR function. Internally pulled high. Direct trigger input 1. Internally pulled high Direct trigger input 2. Internally pulled high Direct trigger input 5. Internally pulled high Direct trigger input 6. Internally pulled high Negative power supply LED1 output Stop signal A or Busy signal Stop signal B LED2 output or Stop signal C Stop signal D Stop signal E PWM output Current type output or PWM output for speaker Negative power supply Positive power supply
TG1 TG2 *TG5 *TG6 VSS1 LED1 STPA/BUSY STPB LED2/STPC STPD STPE SPKAUD/SPK+ VSS2 VDD2
*: TG3, TG4 for W523A008 and W523A010
FUNCTIONAL DESCRIPTION I/O pins: The W523Axxx family provides up to 4 trigger pins, which can be extended to 24 matrix trigger inputs, up to 5 STOP output pins and up to 2 LED output pins. All of these I/O pins' status can be easily defined by PowerSpeech program. Powerful programmable features: The W523Axxx family provides JUMP (JP), LOAD (LD), MOVE (MV), INC, and END commands and 10 programmable registers, such as R0 ~ R3, EN0, EN1, MODE0, MODE1, STOP and PAGE, can be easily used to program the desired playing mode, stop output signal form, LED flash type, and trigger pin interrupt modes. The chip's programmable features can also be used to develop new, customized functions for a wide variety of innovative applications. Programmable Power-on Initialization: Whenever the W523Axxx is powered on or pressed the RESET pin, the program contained in the Publication Release Date: Feb 2002 Revision A2
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