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Details, datasheet, quote on part number:X1226
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| Part: | X1226 |
| Category: | Timing Circuits => Real Time Clocks |
| Description: | Real Time Clock/calendar With Dual Alarms, Programmable Frequency Output, On-chip Oscillator Compensation |
| Company: | Xicor, Inc. |
| Datasheet: | Download X1226 datasheet File size : 430 kB |
| Request For quote: | Find where to buy X1226
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Datasheet text preview:
New Features Repetitive Alarms & Temperature Compensation
4K (512 x 8)
X1226
Real Time Clock/Calendar with EEPROM
2-WireTM RTC
FEATURES · Real Time Clock/Calendar -- Tracks time in Hours, Minutes, and Seconds --Day of the Week, Day, Month, and Year · 2 Polled Alarms (Non-volatile) --Settable on the Second, Minute, Hour, Day of the Week, Day, or Month -- Repeat Mode (periodic interrupts) · Oscillator Compensation on chip -- Internal feedback resistor and compensation capacitors -- 64 position Digitally Controlled Trim Capacitor -- 6 digital frequency adjustment settings to ±30ppm · Battery Switch or Super Cap Input · 512 x 8 Bits of EEPROM -- 64-Byte Page Write Mode -- 8 modes of Block LockTM Protection -- Single Byte Write Capability · High Reliability -- Data Retention: 100 years -- Endurance: 100,000 cycles per byte · 2-WireTM Interface interoperable with I2C* -- 400kHz data transfer rate · Frequency Output (SW Selectable: Off, 1Hz, 4096Hz or 32.768kHz) · Low Power CMOS -- 1.25µA Operating Current (Typical) · Small Package Options -- 8-Lead SOIC and 8-Lead TSSOP BLOCK DIAGRAM
OSC Compensation
X1 Frequency Divider
APPLICATIONS · · · · · · · · · · · · · · · Utility Meters HVAC Equipment Audio / Video Components Set Top Box / Television Modems Network Routers, Hubs, Switches, Bridges Cellular Infrastructure Equipment Fixed Broadband Wireless Equipment Pagers / PDA POS Equipment Test Meters / Fixtures Office Automation (Copiers, Fax) Home Appliances Computer Products Other Industrial / Medical / Automotive
DESCRIPTION The X1226 device is a Real Time Clock with clock/ calendar, two polled alarms with integrated 512x8 EEPROM, oscillator compensation, and battery backup switch. The oscillator uses an external, low-cost 32.768kHz crystal. All compensation and trim components are integrated on the chip. This eliminates several external discrete components and a trim capacitor, saving board area and component cost.
32.768kHz
X2
Oscillator
1Hz
Timer Calendar Logic
Time Keeping Registers (SRAM)
Battery Switch Circuitry
VCC VBACK
PHZ/IRQ
Select Status Registers (SRAM) Mask
SCL SDA
Serial Interface Decoder
Control Decode Logic
Control/ Registers (EEPROM)
Alarm
Compare Alarm Regs (EEPROM) 4K EEPROM ARRAY
8
*I2C is a Trademark of Philips. REV 1.1.24 1/13/03
www.xicor.com
Characteristics subject to change without notice.
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X1226
DESCRIPTION (continued) The Real-Time Clock keeps track of time with separate registers for Hours, Minutes, Seconds. The Calendar has separate registers for Date, Month, Year and Dayof-week. The calendar is correct through 2099, with automatic leap year correction. The powerful Dual Alarms can be set to any Clock/ Calendar value for a match. For instance, every minute, every Tuesday, or 5:23 AM on March 21. The alarms can be polled in the Status Register or provide a hardware interrupt (IRQ Pin). There is a repeat mode for the alarms allowing a periodic interrupt. The PHZ/IRQ pin may be software selected to provide a frequency output of 1 Hz, 4096 Hz, or 32,768 Hz. The device offers a backup power input pin. This VBACK pin allows the device to be backed up by battery or SuperCap. The entire X1226 device is fully operational from 2.7 to 5.5 volts and the clock/calendar por tion of the X1226 device remains fully operational down to 1.8 volts (Standby Mode). The X1226 device provides 4K bits of EEPROM with 8 modes of BlockLockTM control. The BlockLock allows a safe, secure memory for critical user and configuration data, while allowing a large user storage area. PIN DESCRIPTIONS
X1226 8-Pin SOIC X1 X2 1 2 3 4 8 7 6 5 VCC VBACK SCL SDA
An open drain output requires the use of a pull-up resistor. The output circuitry controls the fall time of the output signal with the use of a slope controlled pulldown. The circuit is designed for 400kHz 2-wire interface speed. VBACK This input provides a backup supply voltage to the device. VBACK supplies power to the device in the event the VCC supply fails. This pin can be connected to a battery, a Supercap or tied to ground if not used. Programmable Frequency/Interrupt Output PHZ/IRQ This is either an output from the internal oscillator or an interrupt signal output. It is an open drain output. When used as frequency output, this signal has a frequency of 32.768kHz, 4096Hz, 1Hz or inactive. When used as interrupt output, this signal notifies a host processor that an alarm has occurred and an action is required. It is an active LOW output. The control bits for this function are FO1 and FO0 and are found in address 0011h of the Clock Control Memory map. Refer to "Programmable Frequency Output Bits" on page 6. X1, X2 The X1 and X2 pins are the input and output, respectively, of an inverting amplifier. An external 32.768kHz quartz crystal is used with the X1226 to supply a timebase for the real time clock. The recommended crystal is a Citizen CFS206-32.768KDZF. Internal compensation circuitry is included to form a complete oscillator circuit. Care should be taken in the placement of the crystal and the layout of the circuit. Plenty of ground plane around the device and short traces to X1 and X2 are highly recommended. See Application section for more recommendations. Figure 1. Recommended Crystal connection
X1 X2
8-Pin TSSOP VBACK VCC X1 X2 1 2 3 4 8 7 6 5 SCL SDA VSS PHZ/IRQ
PHZ/IRQ VSS
NC = No internal connection
Serial Clock (SCL) The SCL input is used to clock all data into and out of the device. The input buffer on this pin is always active (not gated). Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. The input buffer is always active (not gated).
POWER CONTROL OPERATION The power control circuit accepts a VCC and a VBACK input. The power control circuit powers the clock from VBACK when VCC < VBACK 0.2V. It will switch back to power the device from VCC when VCC exceeds VBACK.
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REV 1.1.24 1/13/03
www.xicor.com
Characteristics subject to change without notice.
X1226
Figure 2. Power Control
VCC
Voltage
VBACK
Off
On In
the time while an RTC register write is in progress and the RTC continues to run during any nonvolatile write sequences. A single byte may be written to the RTC without affecting the other bytes. Accuracy of the Real Time Clock The accuracy of the Real Time Clock depends on the frequency of the quartz crystal that is used as the time base for the RTC. Since the resonant frequency of a crystal is temperature dependent, the RTC performance will also be dependent upon temperature. The frequency deviation of the crystal is a fuction of the turnover temperature of the crystal from the crystal's nominal frequency. For example, a >20ppm frequency deviation translates into an accuracy of >1 minute per month. These parameters are available from the crystal manufacturer. Xicor's RTC family provides onchip crystal compensation networks to adjust loadcapacitance to tune oscillator frequency from +116 ppm to 37 ppm when using a 12.5 pF load crystal. For more detail information see the Application section. CLOCK/CONTROL REGISTERS (CCR) The Control/Clock Registers are located in an area separate from the EEPROM array and are only accessible following a slave byte of "1101111x" and reads or writes to addresses [0000h:003Fh]. The clock/control memory map has memory addresses from 0000h to 003Fh. The defined addresses are described in the Table 1. Writing to and reading from the undefined addresses are not recommended. CCR Access The contents of the CCR can be modified by performing a byte or a page write operation directly to any address in the CCR. Prior to writing to the CCR (except the status register), however, the WEL and RWEL bits must be set using a two step process (See section "Writing to the Clock/Control Registers.") The CCR is divided into 5 sections. These are: 1. 2. 3. 4. 5. Alarm 0 (8 bytes; non-volatile) Alarm 1 (8 bytes; non-volatile) Control (4 bytes; non-volatile) Real Time Clock (8 bytes; volatile) Status (1 byte; volatile)
REAL TIME CLOCK OPERATION The Real Time Clock (RTC) uses an external 32.768kHz quartz crystal to maintain an accurate internal representation of the second, minute, hour, day, date, month, and year. The RTC has leap-year correction. The clock also corrects for months having fewer than 31 days and has a bit that controls 24 hour or AM/PM format. When the X1226 powers up after the loss of both VCC and VBACK, the clock will not operate until at least one byte is written to the clock register. Reading the Real Time Clock The RTC is read by initiating a Read command and specifying the address corresponding to the register of the Real Time Clock. The RTC Registers can then be read in a Sequential Read Mode. Since the clock runs continuously and a read takes a finite amount of time, there is the possibility that the clock could change during the course of a read operation. In this device, the time is latched by the read command (falling edge of the clock on the ACK bit prior to RTC data output) into a separate latch to avoid time changes during the read operation. The clock continues to run. Alarms occurring during a read are unaffected by the read operation. Writing to the Real Time Clock The time and date may be set by writing to the RTC registers. To avoid changing the current time by an uncompleted write operation, the current time value is loaded into a separate buffer at the falling edge of the clock on the ACK bit before the RTC data input bytes, the clock continues to run. The new serial input data replaces the values in the buffer. This new RTC value is loaded back into the RTC Register by a stop bit at the end of a valid write sequence. An invalid write operation aborts the time update procedure and the contents of the buffer are discarded. After a valid write operation the RTC will reflect the newly loaded data beginning with the next "one second" clock cycle after the stop bit is written. The RTC continues to update
REV 1.1.24 1/13/03
www.xicor.com
Characteristics subject to change without notice.
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