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Details, datasheet, quote on part number:X40014S8I-B
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| Part: | X40014S8I-B |
| Category: | Power Management => Supervisory Circuits => Microprocessor Supervisors |
| Description: | Dual Voltage Monitoring Cpu Supervisor With Power-on-reset, Low Voltage Reset, Watchdog Timer, Fault Detection Register, Wdo Output, Active Low Reset |
| Company: | Xicor, Inc. |
| Datasheet: | Download X40014S8I-B datasheet File size : 127 kB |
| Request For quote: | Find where to buy X40014S8I-B
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Datasheet text preview:
New Features · Monitor Voltages: 5V to 0.9V · Independent Core Voltage Monitor
Preliminary Datasheet
X40010/X40011/X40014/X40015
Dual Voltage Monitor with Integrated CPU Supervisor
FEATURES · Dual voltage detection and reset assertion -- Standard reset threshold settings See Selection table on page 2. -- Adjust low voltage reset threshold voltages using special programming sequence -- Reset signal valid to VCC = 1V -- Monitor three voltages or detect power fail · Independent Core Voltage Monitor (V2MON) · Fault detection register · Selectable power on reset timeout (0.05s, 0.2s, 0.4s, 0.8s) · Selectable watchdog timer interval (25ms, 200ms, 1.4s, off) · Low power CMOS -- 25µA typical standby current, watchdog on -- 6µA typical standby current, watchdog off · 400kHz 2-wire interface · 2.7V to 5.5V power supply operation · Available packages -- 8-lead SOIC, TSSOP APPLICATIONS · Communication Equipment -- Routers, Hubs, Switches -- Disk Arrays, Network Storage · Industrial Systems -- Process Control -- Intelligent Instrumentation · Computer Systems -- Computers -- Network Servers DESCRIPTION The X40010/11/14/15 combines power-on reset control, watchdog timer, supply voltage supervision, and secondary voltage supervision, in one package. This combination lowers system cost, reduces board space requirements, and increases reliability. Applying voltage to VCC activates the power on reset circuit which holds RESET/RESET active for a period of time. This allows the power supply and system oscillator to stabilize before the processor can execute code. Low VCC detection circuitry protects the user's system from low voltage conditions, resetting the system when VCC falls below the minimum VTRIP1 point. RESET/ RESET is active until VCC returns to proper operating level and stabilizes. A second voltage monitor circuit tracks the unregulated supply to provide a power fail warning or monitors different power supply voltage. Three common low voltage combinations are available, however, Xicor's unique circuits allows the
BLOCK DIAGRAM
Watchdog Timer and Reset Logic
SDA
Data Register Command Decode Test & Control Logic Threshold Reset Logic
Fault Detection Register Status Register
WDO
SCL
VCC (V1MON)
+ User Programmable VTRIP1 User Programmable VTRIP2 + V2MON VCC
Power on, Low Voltage Reset Generation
RESET X40010/14 RESET X40011/15
V2MON
V2FAIL
*X40010/11 = V2MON* X40014/15 = VCC
REV 1.3.4 7/12/02
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Characteristics subject to change without notice.
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X40010/X40011/X40014/X40015 Preliminary
threshold for either voltage monitor to be reprogrammed to meet special needs or to fine-tune the threshold for applications requiring higher precision. The Watchdog Timer provides an independent protection mechanism for microcontrollers. When the microcontroller fails to restart a timer within a selectable time out interval, the device activates the WDO signal. The user selects the interval from three preset values. Once selected, the interval does not change, even after cycling the power. The device features a 2-wire interface and software protocol allowing operation on an I2C® bus.
Dual Voltage Monitors Device
X40010/11 -A -B -C X40014/15 -A -B -C
Expected System Voltages
5V; 3V or 3.3V 5V; 3V 3V; 3.3V; 1.8V 3V; 3.3V; 1.5V 3V; 1.5V 3V or 3.3V; 1.1 or 1.2V
Vtrip1(V) 2.04.75* 4.554.65* 4.354.45* 2.852.95* 2.04.75* 2.852.95* 2.552.65* 2.852.95*
Vtrip2(V)
1.704.75 2.852.95 2.552.65 1.651.75 0.903.50* 1.251.35* 1.251.35* 0.951.05*
POR (system)
RESET = X40010 RESET = X40011
RESET = X40014 RESET = X40015
*Voltage monitor requires VCC to operation. Others are independent of VCC.
PIN CONFIGURATION
X40010/14, X40011/15 8-Pin SOIC V2FAIL V2MON RESET /RESET VSS 1 2 3 4 8 7 6 5 VCC WDO SCL SDA WDO VCC V2FAIL V2MON X40010/14, X40011/15 8-Pin TSSOP 1 2 3 4 8 7 6 5 SCL SDA VSS RESET/RESET
PIN DESCRIPTION Pin SOIC TSSOP Name Function 1 3 V2FAIL V2 Voltage Fail Output. This open drain output goes LOW when V2MON is less than VTRIP2 and goes HIGH when V2MON exceeds VTRIP2. There is no power up reset delay circuitry on this pin. 2 4 V2MON V2 Voltage Monitor Input. When the V2MON input is less than the VTRIP2 voltage, V2FAIL goes LOW. This input can monitor an unregulated power supply with an external resistor divider or can monitor a second power supply with no external components. Connect V2MON to VSS or VCC when not used.The V2MON comparator is supplied by V2MON (X40010/11) or by VCC Input (X40014/15). 3 5 RESET/ RESET Output. (X40011/15) This is an active LOW, open drain output which goes active whenRESET ever VCC falls below VTRIP1. It will remain active until VCC rises above VTRIP1 and for the tPURST thereafter. RESET Output. (X40010/14) This is an active HIGH CMOS output which goes active whenever VCC falls below VTRIP1. It will remain active until VCC rises above VTRIP1 and for the tPURST thereafter. 4 6 VSS Ground
REV 1.3.4 7/12/02
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Characteristics subject to change without notice.
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X40010/X40011/X40014/X40015 Preliminary
PIN DESCRIPTION (Continued) Pin SOIC TSSOP Name Function 5 7 SDA Serial Data. SDA is a bidirectional pin used to transfer data into and out of the device. It has an open drain output and may be wire ORed with other open drain or open collector outputs. This pin requires a pull up resistor and the input buffer is always active (not gated). Watchdog Input. A HIGH to LOW transition on the SDA (while SCL is toggled from HIGH to LOW and followed by a stop condition) restarts the Watchdog timer. The absence of this transition within the watchdog time out period results in WDO going active. 6 8 SCL Serial Clock. The Serial Clock controls the serial bus timing for data input and output. 7 1 WDO WDO Output. WDO is an active LOW, open drain output which goes active whenever the watchdog timer goes active. Supply Voltage 8 2 VCC PRINCIPLES OF OPERATION Power On Reset Application of power to the X40010/11/14/15 activates a Power On Reset Circuit that pulls the RESET/RESET pins active. This signal provides several benefits. It prevents the system microprocessor from starting to operate with insufficient voltage. It prevents the processor from operating prior to stabilization of the oscillator. It allows time for an FPGA to download its configuration prior to initialization of the circuit. It prevents communication to the EEPROM, greatly reducing the likelihood of data corruption on power up. When VCC exceeds the device VTRIP1 threshold value for tPURST (selectable) the circuit releases the RESET (X40011) and RESET (X40010) pin allowing the system to begin operation. Low Voltage VCC (V1 Monitoring) During operation, the X40010/11/14/15 monitors the VCC level and asserts RESET/RESET if supply voltage falls below a preset minimum VTRIP1. The RESET/RESET signal prevents the microprocessor from operating in a power fail or brownout condition. The V1FAIL signal remains active until the voltage drops below 1V. It also remains active until VCC returns and exceeds VTRIP1 for tPURST. Low Voltage V2 Monitoring The X40010/11/14/15 also monitors a second voltage level and asserts V2FAIL if the voltage falls below a preset minimum VTRIP2. The V2FAIL signal is either ORed with RESET to prevent the microprocessor from operating in a power fail or brownout condition or used to interrupt the microprocessor with notification of an
REV 1.3.4 7/12/02
impending power failure. For the X40010/11 the V2FAIL signal remains active until the VCC drops below 1V (VCC falling). It also remains active until V2MON returns and exceeds VTRIP2 by 0.2V. This voltage sense circuitry monitors the power supply connected to the V2MON pin. If VCC = 0, V2MON can still be monitored. For the X40014/15 devices, the V2FAIL signal remains actice until VCC drops below 1Vx and remains active until V2MON returns and exceeds VTRIP2. This sense circuitry is powered by VCC. If VCC = 0, V2MON cannot be monitored. Figure 1. Two Uses of Multiple Voltage Monitoring
X40011-A 5V Reg VCC RESET V2MON (2.9V) V2FAIL VCC V2MON
610V 1M 1M
System Reset
Resistors selected so 3V appears on V2MON when unregulated supply reaches 6V.
VCC X40014-C Unreg. Supply 3.3V Reg 1.2V Reg VCC RESET V2MON V2FAIL System Reset
Notice: No external components required to monitor two voltages.
Characteristics subject to change without notice.
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