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Details, datasheet, quote on part number:X5328S8-2.7A
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| Part: | X5328S8-2.7A |
| Category: | Power Management => Supervisory Circuits => Microprocessor Supervisors |
| Description: | Cpu Supervisor With Adjustable Low Voltage Reset, Active Low Reset |
| Company: | Xicor, Inc. |
| Datasheet: | Download X5328S8-2.7A datasheet File size : 398 kB |
| Request For quote: | Find where to buy X5328S8-2.7A
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Datasheet text preview:
Replaces X25328/X25329
X5328/X5329
CPU Supervisor with 32Kbit SPI EEPROM
FEATURES ˇ Low VCC detection and reset assertion -- Five standard reset threshold voltages -- Re-program low VCC reset threshold voltage using special programming sequence -- Reset signal valid to VCC = 1V ˇ Long battery life with low power consumption -- <1ľA max standby current -- <400ľA max active current during read ˇ 32Kbits of EEPROM ˇ Built-in inadvertent write protection -- Power-up/power-down protection circuitry -- Protect 0, 1/4, 1/2 or all of EEPROM array with Block LockTM protection -- In circuit programmable ROM mode ˇ 2MHz SPI interface modes (0,0 & 1,1) ˇ Minimize EEPROM programming time -- 32-byte page write mode -- Self-timed write cycle -- 5ms write cycle time (typical) ˇ 2.7V to 5.5V and 4.5V to 5.5V power supply operation ˇ Available packages -- 14-lead TSSOP, 8-lead SOIC DESCRIPTION These devices combine three popular functions, Poweron Reset Control, Supply Voltage Supervision, and Block Lock Protect Serial EEPROM Memory in one package. This combination lowers system cost, reduces board space requirements, and increases reliability. Applying power to the device activates the power on reset circuit which holds RESET/RESET active for a period of time. This allows the power supply and oscillator to stabilize before the processor can execute code. The device's low VCC detection circuitry protects the user's system from low voltage conditions by holding RESET/RESET active when VCC falls below a minimum VCC trip point. RESET/RESET remains asserted until VCC returns to proper operating level and stabilizes. Five industry standard VTRIP thresholds are available, however, Xicor's unique circuits allow the threshold to be reprogrammed to meet custom requirements or to fine-tune the threshold in applications requiring higher precision.
BLOCK DIAGRAM
WP SI SO SCK CS Data Register Command Decode & Control Logic Protect Logic Status Register EEPROM Array 8Kbits 8Kbits 16Kbits
Reset Timebase RESET/RESET
VCC VTRIP
+ -
Power on and Low Voltage Reset Generation
X5328 = RESET X5329 = RESET
REV 1.1.3 11/13/02
www.xicor.com
Characteristics subject to change without notice.
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X5328/X5329
PIN DESCRIPTION Pin (SOIC/PDIP)
1
Pin TSSOP
1
Name
CS
Function
Chip Select Input. CS HIGH, deselects the device and the SO output pin is at a high impedance state. Unless a nonvolatile write cycle is underway, the device will be in the standby power mode. CS LOW enables the device, placing it in the active power mode. Prior to the start of any operation after power up, a HIGH to LOW transition on CS is required. Serial Output. SO is a push/pull serial data output pin. A read cycle shifts data out on this pin. The falling edge of the serial clock (SCK) clocks the data out. Serial Input. SI is a serial data input pin. Input all opcodes, byte addresses, and memory data on this pin. The rising edge of the serial clock (SCK) latches the input data. Send all opcodes (Table 1), addresses and data MSB first. Serial Clock. The Serial Clock controls the serial bus timing for data input and output. The rising edge of SCK latches in the opcode, address, or data bits present on the SI pin. The falling edge of SCK changes the data output on the SO pin. Write Protect. The WP pin works in conjunction with a nonvolatile WPEN bit to "lock" the setting of the Watchdog Timer control and the memory write protect bits. Ground Supply Voltage Reset Output. RESET/RESET is an active LOW/HIGH, open drain output which goes active whenever VCC falls below the minimum VCC sense level. It will remain active until VCC rises above the minimum VCC sense level for 200ms. RESET/RESET goes active on power up at about 1V and remains active for 200ms after the power supply stabilizes. No internal connections
2 5
2 8
SO SI
6
9
SCK
3 4 8 7
6 7 14 13
WP VSS VCC RESET/ RESET
3-5,10-12
NC
PIN CONFIGURATION
14-Lead TSSOP 8-Lead SOIC/PDIP CS SO WP VCC 1 2 3 4 X5328/29 8 7 6 5 VCC RESET/RESET SCK SI CS SO NC NC NC WP VSS 1 2 3 14 13 12 VCC RESET/RESET NC NC NC SCK SI
4 X5328/29 11 5 6 7 10 9 8
REV 1.1.3 11/13/02
www.xicor.com
Characteristics subject to change without notice.
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X5328/X5329
PRINCIPLES OF OPERATION Power On Reset Application of power to the X5328/X5329 activates a Power On Reset Circuit. This circuit goes active at about 1V and pulls the RESET/RESET pin active. This signal prevents the system microprocessor from starting to operate with insufficient voltage or prior to stabilization of the oscillator. When VCC exceeds the device VTRIP value for 200ms (nominal) the circuit releases RESET/RESET, allowing the processor to begin executing code. Low Voltage Monitoring During operation, the X5328/X5329 monitors the VCC level and asserts RESET/RESET if supply voltage falls below a preset minimum VTRIP. The RESET/RESET signal prevents the microprocessor from operating in a power fail or brownout condition. The RESET/RESET signal remains active until the voltage drops below 1V. It also remains active until VCC returns and exceeds VTRIP for 200ms. VCC Threshold Reset Procedure The X5328/X5329 has a standard VCC threshold (VTRIP) voltage. This value will not change over normal operating and storage conditions. However, in applications where the standard VTRIP is not exactly right, or for higher precision in the VTRIP value, the X5328/ X5329 threshold may be adjusted. Setting the VTRIP Voltage This procedure sets the VTRIP to a higher voltage value. For example, if the current VTRIP is 4.4V and the new VTRIP is 4.6V, this procedure directly makes the change. If the new setting is lower than the current setting, then it is necessary to reset the trip point before setting the new value. To set the new VTRIP voltage, apply the desired VTRIP threshold to the VCC pin and tie the CS pin and the WP pin HIGH. RESET/RESET and SO pins are left unconnected. Then apply the programming voltage VP to both SCK and SI and pulse CS LOW then HIGH. Remove VP and the sequence is complete. Figure 1. Set VTRIP Voltage
CS VP SCK VP SI
Resetting the VTRIP Voltage This procedure sets the VTRIP to a "native" voltage level. For example, if the current VTRIP is 4.4V and the VTRIP is reset, the new VTRIP is something less than 1.7V. This procedure must be used to set the voltage to a lower value. To reset the VTRIP voltage, apply a voltage between 2.7 and 5.5V to the VCC pin. Tie the CS pin, the WP pin, and the SCK pin HIGH. RESET/RESET and SO pins are left unconnected. Then apply the programming voltage VP to the SI pin ONLY and pulse CS LOW then HIGH. Remove VP and the sequence is complete. Figure 2. Reset VTRIP Voltage
CS VCC
SCK
VP SI
REV 1.1.3 11/13/02
www.xicor.com
Characteristics subject to change without notice.
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