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Details, datasheet, quote on part number:X9258U
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| Part: | X9258U |
| Category: | Analog & Mixed-Signal Processing => Potentiometers => Digital Potentiometers |
| Description: | Quad 256 Tap Xdcp, Low Power, Two-wire Interface, Dual Supply |
| Company: | Xicor, Inc. |
| Datasheet: | Download X9258U datasheet File size : 422 kB |
| Request For quote: | Find where to buy X9258U
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Datasheet text preview:
APPLICATION NOTES AVAILABLE
AN99 · AN115 · AN120 · AN124 · AN133 · AN134 · AN135
Low Noise/Low Power/2-Wire Bus/256 Taps
X9258
Quad Digital Controlled Potentiometers (XDCPTM)
FEATURES · · · · · · · · Four potentiometers in one package 256 resistor taps/pot0.4% resolution 2-wire serial interface Wiper resistance, 40 typical @ V+ = 5V, V- = -5V Four nonvolatile data registers for each pot Nonvolatile storage of wiper position Standby current < 5µA max (total package) Power supplies -- VCC = 2.7V to 5.5V -- V+ = 2.7V to 5.5V -- V- = -2.7V to -5.5V 100K, 50K total pot resistance High reliability -- Endurance 100,000 data changes per bit per register -- Register data retention 100 years 24-lead SOIC, 24-lead TSSOP, 24-lead CSP (Chip Scale Package) Dual supply version of X9259 DESCRIPTION The X9258 integrates 4 digitally controlled potentiometers (XDCP) on a monolithic CMOS integrated circuit. The digitally controlled potentiometer is implemented using 255 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the 2-wire bus interface. Each potentiometer has associated with it a volatile Wiper Counter Register (WCR) and 4 nonvolatile Data Registers (DR0:DR3) that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array though the switches. Power up recalls the contents of DR0 to the WCR. The XDCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing.
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BLOCK DIAGRAM
VCC VSS V+ VWP SCL SDA A0 A1 A2 A3 R2 R3 Pot 0 R0 R1 Wiper Counter Register (WCR) VH0/RH0 R0 R1 Wiper Counter Register (WCR) Resistor Array Pot 2 VH2/RH2
VL0/RL0 VW0/RW0
R2 R3
VL2/RL2 VW2/RW2
Interface and Control Circuitry
8 Data R0 R1 Wiper Counter Register (WCR) Resistor Array Pot 1 VW1/RW1 VH1/RH1 R0 R1 Wiper Counter Register (WCR) VW3/RW3 Resistor Array Pot 3 VH3/RH3
R2 R3
VL1/RL1
R2 R3
VL3/RL3
REV 1.1.7 2/4/03
www.xicor.com
Characteristics subject to change without notice.
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X9258
PIN DESCRIPTIONS Host Interface Pins SERIAL CLOCK (SCL) The SCL input is used to clock data into and out of the X9258. SERIAL DATA (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open collector outputs. An open drain output requires the use of a pull-up resistor. For selecting typical values, refer to the guidelines for calculating typical values on the bus pull-up resistors graph. DEVICE ADDRESS (A0A3) The Address inputs are used to set the least significant 4 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the address input in order to initiate communication with the X9258. A maximum of 16 devices may occupy the 2-wire serial bus. Potentiometer Pins VH/RH (VH0/RH0VH3/RH3), VL/RL (VL0/RL0VL3/RL3) The VH/RH and VL/RL inputs are equivalent to the terminal connections on either end of a mechanical potentiometer. VW/RW (VW0/RW0VW3/RW3) The wiper outputs are equivalent to the wiper output of a mechanical potentiometer.
C V+ D RL3 E RW3 F Top ViewBumps Down A0 SCL RL2 NC A3 RW2 RH3 RH2 V1 RW0 2 A2 WP NC A0 VW3/RW3 VH3/RH3 VL3/RL3 V+ VCC VL0/RL0 VH0/RH0 VW0/RW0 A2 WP
PIN CONFIGURATION
SOIC/TSSOP 1 2 3 4 5 6 7 8 9 10 11 12 X9258 24 23 22 21 20 19 18 17 16 15 14 13 A3 SCL VL2/RL2 VH2/RH2 VW2/RW2 V VSS VW1/RW1 VH1/RH1 VL1/RL1 A1 SDA
CSP 3 A1 4 RL1 RW1
A
RL0 B VCC
SDA
RH0
RH1
VSS
Hardware Write Protect Input (WP) The WP pin when low prevents nonvolatile writes to the Data Registers. Analog Supplies V+, VThe Analog Supplies V+, V- are the supply voltages for the DCP analog section.
REV 1.1.7 2/4/03
www.xicor.com
Characteristics subject to change without notice.
2 of 22
X9258
PIN NAMES Symbol
SCL SDA A0-A3 VH0/RH0VH3/RH3, VL0/RL0VL3/RL3 VW0/RW0VW3/RW3 WP V+,VVCC VSS NC
Description
Serial Clock Serial Data Device Address Potentiometer Pins (terminal equivalent) Potentiometers Pins (wiper equivalent) Hardware Write Protection Analog Supplies System Supply Voltage System Ground No Connection (Allowed)
Stop Condition All communications must be terminated by a stop condition, which is a LOW to HIGH transition of SDA while SCL is HIGH. Acknowledge Acknowledge is a software convention used to provide a positive handshake between the master and slave devices on the bus to indicate the successful receipt of data. The transmitting device, either the master or the slave, will release the SDA bus after transmitting eight bits. The master generates a ninth clock cycle and during this period the receiver pulls the SDA line LOW to acknowledge that it successfully received the eight bits of data. The X9258 will respond with an acknowledge after recognition of a start condition and its slave address and once again after successful receipt of the command byte. If the command is followed by a data byte the X9258 will respond with a final acknowledge. Array Description The X9258 is comprised of four resistor arrays. Each array contains 255 discrete resistive segments that are connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical potentiometer (VH/RH and VL/RL inputs). At both ends of each array and between each resistor segment is a CMOS switch connected to the wiper (VW) output. Within each individual array only one switch may be turned on at a time. These switches are controlled by the Wiper Counter Register (WCR). The 8 bits of the WCR are decoded to select, and enable, one of 256 switches. The WCR may be written directly, or it can be changed by transferring the contents of one of four associated data registers into the WCR. These data registers and the WCR can be read and written by the host system. Device Addressing Following a start condition the master must output the address of the slave it is accessing. The most significant four bits of the slave address are the device type identifier (refer to Figure 1 below). For the X9258 this is fixed as 0101[B].
PRINCIPLES OF OPERATION The X9258 is a highly integrated microcircuit incorporating four resistor arrays and their associated registers and counters and the serial interface logic providing direct communication between the host and the DCP potentiometers. Serial Interface--2-Wire The X9258 supports a bidirectional bus oriented protocol. The protocol defines any device that sends data onto the bus as a transmitter and the receiving device as the receiver. The device controlling the transfer is a master and the device being controlled is the slave. The master will always initiate data transfers and provide the clock for both transmit and receive operations. Therefore, the X9258 will be considered a slave device in all applications. Clock and Data Conventions Data states on the SDA line can change only during SCL LOW periods (tLOW). SDA state changes during SCL HIGH are reserved for indicating start and stop conditions. Start Condition All commands to the X9258 are preceded by the start condition, which is a HIGH to LOW transition of SDA while SCL is HIGH (tHIGH). The X9258 continuously monitors the SDA and SCL lines for the start condition and will not respond to any command until this condition is met.
REV 1.1.7 2/4/03
www.xicor.com
Characteristics subject to change without notice.
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