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Details, datasheet, quote on part number:X9401WB24I-2.7
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Datasheet text preview:
APPLICATION NOTES AVAILABLE
AN99 · AN115 · AN120 · AN124 · AN133 · AN134
Low Noise/Low Power/SPI Bus
X9401
FEATURES · · · · · · · · · · · Quad4 separate pots, 64 taps/pot Nonvolatile storage of wiper position Four Nonvolatile Data Registers for Each Pot 16-bytes of EEPROM memory SPI serial interface RTotal = 10k Wiper resistance = 150 typical Standby current < 1µA (total package) Operating current < 400µA max. VCC = 2.7V to 5V Packages24-lead TSSOP, SOIC, CSP (Chip Scale Package) · 100 year data retention DESCRIPTION
Preliminary Information
Quad, 64 Tap, Digitally Controlled Potentiometer (XDCPTM)
The X9401 integrates 4 digitally controlled potentiometers (XDCP) on a monolithic CMOS integrated microcircuit. The digitally controlled potentiometer is implemented using 64 resistive elements in a series array. Between each element are tap points connected to the wiper terminal through switches. The position of the wiper on the array is controlled by the user through the SPI bus interface. Each potentiometer has associated with it a volatile Wiper Counter Register (WCR) and 4 nonvolatile Data Registers (DR0:DR3) that can be directly written to and read by the user. The contents of the WCR controls the position of the wiper on the resistor array through the switches. Power up recalls the contents of DR0 to the WCR. The XDCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing.
BLOCK DIAGRAM
VCC VSS R0 R1 Pot 0 Wiper Counter Register (WCR) VH0/RH0 R0 R1 Wiper Counter Register (WCR) VH2/RH2
HOLD CS SCK SO SI A0 A1 WP Interface and Control Circuitry Data
R2 R3
VL0/RL0 VW0/RW0
R2 R3
Resistor Array Pot 2
VL2/RL2 VW2/RW2
8 VW1/RW1 R0 R1 Wiper Counter Register (WCR) Resistor Array Pot 1 VH1/RH1 R0 R1 Wiper Counter Register (WCR) VW3/RW3 VH3/RH3
R2 R3
VL1/RL1
R2 R3
Resistor Array Pot 3
VL3/RL3
REV 1.8 10/1/03
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Characteristics subject to change without notice.
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X9401 Preliminary Information
PIN DESCRIPTIONS Host Interface Pins Serial Output (SO) SO is a push/pull serial data output pin. During a read cycle, data is shifted out on this pin. Data is clocked out by the falling edge of the serial clock. Serial Input SI is the serial data input pin. All opcodes, byte addresses and data to be written to the pots and pot registers are input on this pin. Data is latched by the rising edge of the serial clock. Serial Clock (SCK) The SCK input is used to clock data into and out of the X9401. Chip Select (CS) When CS is HIGH, the X9401 is deselected and the SO pin is at high impedance, and (unless an internal write cycle is underway) the device will be in the standby state. CS LOW enables the X9401, placing it in the active power mode. It should be noted that after a power-up, a HIGH to LOW transition on CS is required prior to the start of any operation. Hold (HOLD) HOLD is used in conjunction with the CS pin to select the device. Once the part is selected and a serial sequence is underway, HOLD may be used to pause the serial communication with the controller without resetting the serial sequence. To pause, HOLD must be brought LOW while SCK is LOW. To resume communication, HOLD is brought HIGH, again while SCK is LOW. If the pause feature is not used, HOLD should be held HIGH at all times. Device Address (A0A1) The address inputs are used to set the least significant 2 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the address input in order to initiate communication with the X9401. A maximum of 4 devices may occupy the SPI serial bus. Potentiometer Pins VH (VH0VH3), VL (VL0VL3), RH (RH0RH3), RL (RL0RL3) The VH/RH and VL/RL inputs are equivalent to the terminal connections on either end of a mechanical potentiometer. VW (VW0VW3), RW (RW0RW3) The wiper outputs are equivalent to the wiper output of a mechanical potentiometer. Hardware Write Protect Input (WP) The WP pin when LOW prevents nonvolatile writes to the Wiper Counter Registers. PIN CONFIGURATION
SOIC VCC VL0/RL0 VH0/RH0 VW0/RW0 CS WP SI A1 VL1/RL1 VH1/RH1 VW1/RW1 V
SS
CSP 24 23 22 21 20 19 18 17 16 15 14 13 NC VL3/RL3 VH3/RH3 VW3/RW3 A0 SO HOLD SCK VL2/RL2 VH2/RH2 VW2/RW2 NC F D E A B C 1
VW0/RW0 VL0/RL0 VCC NC
TSSOP 3
A1 SI
1 2 3 4 5 6 7 8 9 10 11 12 X9401
2
CS WP
4
VL1/RL1 VW1/RW1 VSS NC
SI A1 VL1/RL1 VH1/RH1 VW1/RW1 VSS NC VW2/RW2 VH2/RH2 VL2/RL2 SCK
1 2 3 4 5 6 7 8 9 10 11 12 X9401
24 23 22 21 20 19 18 17 16 15 14 13
WP CS VW0/RW0 VH0/RH0 VL0/RL0 VCC NC VL3/RL3 VH3/RH3 VW3/RW3 A0 SO
VH0/RH0 VH1/RH1
VH3/RH3 VH2/RH2
SO A0
VL3/RL3 VW3/RW3
HOLD VW2/RW2 SCK
VL2/RL2
Top ViewBumps Down
HOLD
REV 1.8 10/1/03
www.xicor.com
Characteristics subject to change without notice.
2 of 21
X9401 Preliminary Information
PIN NAMES Symbol
SCK SI, SO A0-A1 VH0/RH0VH3/RH3, VL0/RL0VL3/RL3 VW0/RW0VW1/RW1 WP VCC VSS NC
Description
Serial Clock Serial Data Device Address Potentiometers (terminal equivalent) Potentiometers (wiper equivalent) Hardware Write Protection System Supply Voltage System Ground No Connection
These switches are controlled by a Wiper Counter Register (WCR). The six bits of the WCR are decoded to select, and enable, one of sixty-four switches. Wiper Counter Register (WCR) The X9401 contains four Wiper Counter Registers, one for each XDCP potentiometer. The WCR is equivalent to a serial-in, parallel-out register/counter with its outputs decoded to select one of sixty-four switches along its resistor array. The contents of the WCR can be altered in four ways: it may be written directly by the host via the Write Wiper Counter Register instruction (serial load); it may be written indirectly by transferring the contents of one of four associated data registers via the XFR Data Register or Global XFR Data Register instructions (parallel load); it can be modified one step at a time by the Increment/Decrement instruction. Finally, it is loaded with the contents of its data register zero (R0) upon power-up. The Wiper Counter Register is a volatile register; that is, its contents are lost when the X9401 is powereddown. Although the register is automatically loaded with the value in R0 upon power-up, this may be different from the value present at power-down. The wiper position must be stored in R0 to insure restoring the wiper position after power-up. Data Registers Each potentiometer has four 6-bit nonvolatile data registers. These can be read or written directly by the host. Data can also be transferred between any of the four data registers and the associated Wiper Counter Register. All operations changing data in one of the data registers is a nonvolatile operation and will take a maximum of 10ms. If the application does not require storage of multiple settings for the potentiometer, the data registers can be used as memory locations for system parameters or user preference data. Data Register Detail
(MSB) D5 NV D4 NV D3 NV D2 NV D1 NV (LSB) D0 NV
DEVICE DESCRIPTION The X9401 is a highly integrated microcircuit incorporating four resistor arrays and their associated registers and counters and the serial interface logic providing direct communication between the host and the XDCP potentiometers. Serial Interface The X9401 supports the SPI interface hardware conventions. The device is accessed via the SI input with data clocked in on the rising SCK. CS must be LOW and the HOLD and WP pins must be HIGH during the entire operation. The SO and SI pins can be connected together, since they have three state outputs. This can help to reduce system pin count. Array Description The X9401 is comprised of four resistor arrays. Each array contains 63 discrete resistive segments that are connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical potentiometer (VH/RH and VL/RL inputs). At both ends of each array and between each resistor segment is a CMOS switch connected to the wiper (VW/RW) output. Within each individual array only one switch may be turned on at a time.
REV 1.8 10/1/03
www.xicor.com
Characteristics subject to change without notice.
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