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Details, datasheet, quote on part number:X9430WS24
 
 
Part:X9430WS24
Category:Analog & Mixed-Signal Processing => Potentiometers => Digital Potentiometers
Description:Dual Smart Opamp With Dual 64 Tap Xdcp, Low Power, Spi, Dual Supply
Company:Xicor, Inc.
Datasheet:Download X9430WS24 datasheet   File size : 140 kB
Request For quote:  Find where to buy X9430WS24
 



Datasheet text preview:
Preliminary Information Programmable Analog
X9430
DESCRIPTION The X9430 is a monolithic CMOS IC that incorporates two operational amplifiers and two nonvolatile digitally controlled potentiometers. The amplifiers are CMOS differential input voltage operational amplifiers with near rail-to-rail outputs. All pins for the two amplifiers are brought out of the package to allow combining them with the potentiometers or using them as complete stand-alone amplifiers. The digitally controlled potentiometers consist of a series string of 63 polycrystalline resistors that behave as standard integrated circuit resistors. The SPI serial por t, common to both pots, allows the user to program the connection of the wiper output to any of the resistor nodes in the series string. The wiper position is saved in the on board E2 memory to allow for nonvolatile restoration of the wiper position. A wide variety of applications can be implemented using the potentiometers and the amplifiers. A typical application is to implement the amplifier as a wiper buffer in circuits that use the potentiometer as a voltage reference. The potentiometer can also be combined with the amplifier yielding a digitally programmable gain amplifier or programmable current source.
Dual Digitally Controlled Potentiometer (XDCPTM) with Operational Amplifier
FEATURES · · · · Two CMOS voltage operational amplifiers Two digitally controlled potentiometers Can be combined or used separately Amplifiers -- Low voltage operation -- V+/V- = ±2.7V to ±5.5V -- Rail-to-rail CMOS performance -- 1MHz gain bandwidth product · Digitally controlled potentiometer -- Dual 64 tap potentiometers -- Rtotal = 10k --SPI serial interface -- VCC = 2.7V to 5.5V
BLOCK DIAGRAM
VCC HOLD VNI0 CS SCK SO SI A1 A0 Control and Memory WCR0 + ­ VOUT0 VINV0 VNI1 + WCR1 ­ VOUT1 VINV1 WP RW0 RH0 RL0 V+
VSS
RW1
RL1 RH1

REV 1.0 6/20/00
www.xicor.com
Characteristics subject to change without notice.
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X9430 ­ Preliminary Information
PIN DESCRIPTIONS Host Interface Pins Serial Output (SO) SO is a push/pull serial data output pin. During a read cycle, data is shifted out on this pin. Data is clocked out by the falling edge of the serial clock. Serial Input (SI) SI is the serial data input pin. All opcodes, byte addresses and data to be written to the device are input on this pin. Data is latched by the rising edge of the serial clock. Serial Clock (SCK) The SCK input is used to clock data into and out of the X9430. Chip Select (CS) When CS is HIGH, the X9430 is deselected and the SO pin is at high impedance, and (unless an internal write cycle is underway) the device will be in the standby state. CS LOW enables the X9430, placing it in the active power mode. It should be noted that after a power-up, a HIGH to LOW transition on CS is required prior to the start of any operation. Hardware Write Protect Input WP The WP pin when low prevents nonvolatile writes to the wiper counter register. Hold (HOLD) HOLD is used in conjunction with the CS pin to select the device. Once the part is selected and a serial sequence is underway, HOLD may be used to pause the serial communication with the controller without resetting the serial sequence. To pause, HOLD must be brought LOW while SCK is LOW. To resume communication, HOLD is brought HIGH, again while SCK is LOW. If the pause feature is not used, HOLD should be held HIGH at all times. Device Address (A0­A1) The address inputs are used to set the least significant 2 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the address input in order to initiate communication with the X9430. A maximum of 4 devices may occupy the SPI serial bus. Potentiometer Pins1 RH (RH0­RH1), RL (RL0­RL1) The RH and RL inputs are equivalent to the terminal connections on either end of a mechanical potentiometer. RW (RW0­RW1) The wiper output is equivalent to the wiper output of a mechanical potentiometer. Amplifier and Device Pins Amplifier Input Voltage VNI(0,1) and VINV(0,1) VNI and VINV are inputs to the noninverting (+) and inver ting (-) inputs of the operational amplifiers. Amplifier Output Voltage VOUT(0,1) VOUT is the voltage output pin of the operational amplifier. Analog Supplies V+, VThe Analog Supplies V+, V- are the supply voltages for the XDCP analog section and the operational amplifiers. System Supply VCC and Ground VSS The system supply VCC and its reference VSS is used to bias the interface and control circuits.
1.
Alternate designations for RH, RL, RW are VH, VL, VW
REV 1.0 6/20/00
www.xicor.com
Characteristics subject to change without notice.
2 of 21
X9430 ­ Preliminary Information
PIN CONFIGURATION
SOIC VCC RL0 RH0 RW0 CS WP SI A1 RL1 RH1 RW1 VSS 1 2 3 4 5 6 7 8 9 10 11 12 X9430
PIN NAMES Symbol
SCK
24 23 22 21 20 19 18 17 16 15 14 13 V+ VOUT0 VNI0 VINV0 A0 S0 HOLD SCK VINV1 VNI1 VOUT1 V-
Description
Serial Clock Serial Input Serial Output Device Address Chip Select Hold Potentiometers (terminal equivalent) Potentiometers (wiper equivalent) Amplifier Input Voltages Amplifier Outputs Hardware Write Protection Analog and Voltage Amplifier Supplies System/Digital Supply Voltage System Ground
SI SO A0-A1 CS HOLD RH0­RH1, RL0­RL1 RW0­RW1 VNI(0,1), VINV(0,1) VOUT0, VOUT1 WP
TSSOP SO A0 VINV0 VNI0 VOUT0 V+ VCC RL0 RH0 RW0 CS WP 1 2 3 4 5 6 7 8 9 10 11 12 X9430 24 23 22 21 20 19 18 17 16 15 14 13 HOLD SCK VINV1 VNI1 VOUT1 VVSS RW1 RH1 RL1 A1 SI
V+,VVCC VSS
PRINCIPLES OF OPERATION The X9430 is an integrated microcircuit incorporating two digitally controlled potentiometers, two operational amplifiers and their associated registers and counters; and the serial interface logic providing direct communication between the host and the digitally controlled potentiometers. Serial Interface The X9430 supports the SPI interface hardware conventions. The device is accessed via the SI input with data clocked in on the rising edge of SCK. CS must be LOW and the HOLD and WP pins must be HIGH during the entire operation.
REV 1.0 6/20/00
www.xicor.com
Characteristics subject to change without notice.
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