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Details, datasheet, quote on part number:YSS922-S
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| Part: | YSS922-S |
| Category: | Multimedia => Audio => Processors |
| Description: | Single Chip Comprising Three Blocks: (a) Spdif Receiver; (b) Main DSP: Dolby Digital (AC3) / Prologic / DTS Decoder; And (c) Sub-DSP: Dedicated Audio Processing |
| Company: | Yamaha Corporation of America |
| Datasheet: | Download YSS922-S datasheet File size : 305 kB |
| Request For quote: | Find where to buy YSS922-S
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Datasheet text preview:
YSS922
AC3D3
OUTLINE
96kHz sampling frequency.
Preliminary
96kHz DIR + Dolby Digital / Pro Logic / DTS decoder + Sub DSP
YSS922 is one chip LSI consisting of three built-in blocks : Dolby Digital (AC-3) / Pro Logic & DTS decoder (Main DSP), a programmable sound processing DSP (Sub DSP) and SPDIF receiver (DIR) which can handle up to The Sub DSP is capable of realizing various sound fields, such as virtual surround by down-loading the program and coefficient from outside.
FEATURES
DIR Block
· Sampling frequency: two ranges are available including; 32k to 48kHz (normal rate) and 64k to 96kHz (double rate) · Provides master clock, 256fs, to DAC, ADC and other peripheral devices. The clock output can be controlled with various modes determined by register setting. · Has a pin that indicates the double rate operation. · Every channel status and user data can be read through the microprocessor interface. · Has an output pin for interrupt that is activated by changing of the status information. · Internal operation frequency: 25MHz
Main DSP Block
· Dolby Digital (AC-3) / Pro Logic and DTS decode · High quality internal 24 bit DSP · No external memory is required. (Memory for center and surround channel delay is included.) · AC-3 Karaoke mode. · Supports compression modes at AC-3 / DTS decoding. · Pro Logic decoding for Dolby Digital 2 channels decoded signal as well as ordinary PCM signal. · Reads Dolby Digital / DTS decode information through the microprocessor interface. · Included de-emphasis filter for the PCM signal. · Internal operation frequency: 30MHz
YAMAHA CORPORATION
YSS922 CATALOG CATALOG No.: LSI-4SS922A1 2000.2
YSS922
Sub DSP Block
· Capable of realizing various sound fields, such as simulation surround, output configuration and virtual surround by down-loading the programs. · Adoption of the 32 bit floating point DSP assuring highly accurate processing. · Up to 2.73 seconds delay at fs=48kHz achievable by adding DRAM or SRAM externally. · Internal operation frequency: 30MHz
Other Features
· Connectable to almost all ADC and DAC by making appropriate settings to the control register. · Total of 16 general purpose input/output ports are available. · 2 built-in PLL circuits for generation of operation clocks for DIR block and DSP blocks. · Supports the power down mode. · Power supply voltage: 2 power sources (2.5V for core logic section and 3.3v for I/O section) · Si-gate CMOS process · 128SQFP (YSS922-S)
Note: "AC-3" and "Pro Logic" are registered trademarks of Dolby Laboratories Licensing corporation. "DTS" is a registered trademark of DTS, Inc. Use of this LSI must be licensed by both Dolby Laboratories Licensing Corporation and DTS, Inc.
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YSS922
BLOCK DIAGRAM
SYNC/U
7
6
5
IPORT5-7
VMOD
DBL V
BSMOD
BS ERR
DDINSEL
UMOD
SYNC U
CMOD
FS128 C
DIRPCO DIRPRO
PLL
C l o c k for DIR Block (25MHz)
DIR
FS128/C
ERR/BS
DIRINT
DBL/V
/LOCK
DDIN3
DDIN2
DDIN1
DDIN0
DIRMCK D I R O Interface DIRBCK DIRWCK SDBCKI0 SDWCKI0 SDIASEL SDIACKSEL
DIRSDO SDIA
MainDSP XI XO CPO
(AC-3/ProLogic/DTS decoder)
Microprocessor I/F
Control Register
PLL
Control Signal
SURENC KARAOKE MUTE CRC AC3DATA DTSDATA NONPCM ZEROFLG
S D I A Interface CRC
/SDBCKO
IPORT0-4
/CS SO SI SCK
C l o c k for DSP Block (30MHz)
S D O A Interface
L,R LS,RS C,LFE
SDOA0 SDOA1 SDOA2 SDIB0 SDIB1 SDIB2 SDIB3
OPORT0-7
SDIBSEL SDIBCKSEL
S D I B Interface RAMD0-15 CASN RASN RAMWEN RAMOEN RAMA0-17
External Memory Interface
SubDSP
OVFSEL OVFB END
Coefficient / Program RAM
OVFB/END
S D O B Interface
SDOBCKSEL
SDWCKI1
SDBCKI1
SDOB3
SDOB2
SDOB1
SDOB0
MPLOAD
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