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Details, datasheet, quote on part number:MT8804AE
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| Part: | MT8804AE |
| Category: | Analog & Mixed-Signal Processing => Switches & Multiplexers => Analog Switches => Low (RDSon) Cross Point Switches |
| Description: | Description = 8 X 4 Analog Switch Array With Low On-resistance, For (VDD - VEE) = 5V to 15V ;; Package Type = Pdip ;; No. Of Pins = 24 |
| Company: | Zarlink Semiconductor |
| Datasheet: | Download MT8804AE datasheet File size : 528 kB |
| Request For quote: | Find where to buy MT8804AE
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Datasheet text preview:
CMOS MT8804A 8 x 4 Analog Switch Array
Features
· · · · · · · · · · Micropro c e s s o r compatible control inputs On chip control memory and address decoding Row addressing Master reset 32 crosspoint switches in 8 x 4 array 5.0V to 15.0V operation Low crosstalk between switches Low on resistance: 90 (typ.) at 13V Matched switch characteristics Switches frequencies up to 40MHz
ISSUE 3
March 1997
Ordering Information MT8804AE MT8804AP 24 Pin Plastic DIP 28 Pin PLCC -40° to 85°C
Description
The MT8804A is a CMOS/LSI 8 x 4 Analog Switch Array incorporating control memory (32 bits), decoder and digital logic level converters. This circuit has digitally controlled analog switches having very low "ON" resistance and very low "OFF" leakage current. Switches will operate with analog signals at frequencies to 40 MHz and up to 15.0Vp-p. A "HIGH" on the Master Reset input switches all channels "OFF" and clears the memory. This device is ideal for crosspoint switching applications.
Applications
· · · · PABX and key sytems Data acquisition systems Test equipment/instrumentation Analog/d i g i t a l multiplexers
AE
D0 D1 D2 D3
VDD
VEE
VSS
1
1 ················
A0 A1 A2 8 32 3 to 8 Decoder 8x4 Latches Switch Array
Li I/O (i=0-7)
···················
MR
Ji I/O (i=0-3)
Fi g u r e 1 - Functional Block Diagram
3-3 3-3
MT8804A
CMOS
24 PIN PLASTIC DIP
Figure 2 - Pin Connections
Pin Description
Pin # Name
PDIP PLCC
Description
1-3 4 5 6 7 8 9 10 11 12 13
1-3 6 7 8 9 10 11 12 13 14 15
L2-L0 L2-L0 Analog Lines (Inputs/Outputs): These are connected to the L2-L0 columns of the switch array. D0 J0 DI J1 D2 J2 D3 J3 VSS VEE D0 Data (Input): Active High. J0 Analog Junctor (Input/Output). This is connected to the J0 row of the switch array. DI Data (Input). Active High. J1 Analog Junctor (Input/Output). This is connected to the J1 row of the switch array. D2 Data (Input): Active High. J2 Analog Junctor (Input/Output). This is connected to the J2 row of the switch array. D3 Data (Input): Active High. J3 Analog Junctor (Input/Output). This is connected to the J3 row of the switch array. Digital Ground Reference. Negative Power Supply.
14-16 16,17, A0-A2 A0-A2 Address Lines (Inputs). 20 17 21 AE Address Enable/Strobe (Input). Enables function selected by address and data. Address must be stable before AE goes high and D0-D3 must be stable on the falling edge of the AE. Active High. Master RESET (Input). This is used to turn off all switches. Active High.
18
22
MR
19-23 23-27 24 28 4, 5,18, 19,
L7-L3 L7-L3 Analog Lines (Inputs/Outputs). These are connected to the L7-L3 columns of the switch array. VDD NC Positive Power Supply. No Connect.
3-4
D3 J3 VSS VEE A0 A1 NC
L2 L1 L0 D0 J0 D1 J1 D2 J2 D3 J3 VSS
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
VDD L3 L4 L5 L6 L7 MR AE A2 A1 A0 VEE
4 3 2 1 28 27 26
·
NC L0 L1 L2 VDD L3 L4
12 13 14 15 16 17 18
NC D0 J0 D1 J1 D2 J2
5 6 7 8 9 10 11
25 24 23 22 21 20 19
L5 L6 L7 MR AE A2 NC
28 PIN PLCC
CMOS
Functional Description
The MT8804A is a CMOS/LSI 8 X 4 Analog Switch Array incorporating an 8 X 4 analog switch array, address decoder, control memory, and digital logic level converter. The analog switch array is arranged in 8 rows and 4 columns. The row input/outputs are referred to as Lines (L0-L7) and the column input/outputs as Junctors (J0-J3). The crosspoint analog switches interconnect the lines and junctors when turned "ON" and provide a high degree of isolation when turned "OFF". Interchannel crosstalk is minimal despite the high density of the analog switch array. The control memor y of the MT8804A can be treated as an 8 word by 4 bit random access memory. The 8 words are selected by the ADDRESS (A0-A2) inputs through the on chip address decoder. Data is presented to the memory via the four DATA inputs (D0-D3). This data is asynchronously written into the control memory whenever the ADDRESS ENABLE (AE) input is HIGH. A HIGH level written into a memor y cell turns the corresponding crosspoint switch "ON" while a LOW level causes the crosspoint to turn "OFF". Only the crosspoint switches corresponding to the addressed memory word are affected when data is written into the memory. The remaining switches retain their previous states. By establishing appropriate patterns in the control memory, any combination of lines and junctors may be interconnected. A HIGH level on the MASTER RESET (MR) input returns all memory locations to a LOW level and turns all crosspoint switches "OFF" effectively isolating the lines from the junctors. The digital logic level converters allow the digital input levels to differ from limits of the analog levels switched through the array. For example, with 8x8 Analog/Digital Switch
Two MT8804s configured as shown, implement an 8 x 8 analog/digital switch. The switch capacity can be expanded to an M x N array of inputs/ outputs. Expansion in the M dimension is as shown with the MT8804A lines (L0-L7) commoned. Expansion in the N dimension is accomplished by replicating the circuit shown and connecting the MT8804A junctors (J0-J3) in common. The address and data control inputs of the MT8804A's can be connected in common for any size and switch provided that the address enable (AE) inputs are driven individually. A par ticular signal path is connected by setting up the appropriate signals or the address and data lines and taking the corresponding address enable input high. The master reset (MR), when taken high, disconnects all signal paths.
MT8804A
Figure 3 - On Resistance vs. Temperature (Input Signal Voltage=Supply Voltage/2) VDD=5V, VSS=0V and VEE=-6V, the control inputs can be driven by a 5V system while the analog voltages through the crosspoint switches can swing from +5V to -6V.
Figure 4 - On Resistance vs. Input Signal Voltage
Figure 5 - 8 x 8 Analog/Digital Switch
3-5
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