|
Details, datasheet, quote on part number:MT8808AE
| |
| Part: | MT8808AE |
| Category: | Analog & Mixed-Signal Processing => Switches & Multiplexers => Analog Switches => Low (RDSon) Cross Point Switches |
| Description: | Description = 8 X 8 Analog Switch Array With Low On-resistance, For (VDD - VEE) =4. 5V to 13.2V ;; Package Type = Pdip ;; No. Of Pins = 28 |
| Company: | Zarlink Semiconductor |
| Datasheet: | Download MT8808AE datasheet File size : 495 kB |
| Request For quote: | Find where to buy MT8808AE
|
| |
Datasheet text preview:
ISO-CMOS MT8808 8 x 8 Analog Switch Array
Features
· · · · · · · · · · Inter nal control latches and address decoder Shor t set-up and hold times Wide operating voltage: 4.5V to 13.2V 12Vpp analog signal capability RON 65 max. @ VDD=12V, 25°C RON 10 @ VDD=12V, 25°C Full CMOS switch for low distortion Minimum feedthrough and crosstalk Separate analog and digital reference supplies Low power consumption ISO-CMOS technology
ISSUE 3
March 1997
Ordering Information MT8808AE 28 Pin Plastic DIP MT8808AP 28 Pin PLCC -40° to 85°C
Description
The Zarlink MT8808 is fabricated in Zarlink's ISOCMOS technology providing low power dissipation and high reliability. The device contains a 8 x 8 array of crosspoint switches along with a 6 to 64 line decoder and latch circuits. Any one of the 64 switches can be addressed by selecting the appropriate six address bits. The selected switch can be turned on or off by applying a logical one or zero to the DATA input. VSS is the ground reference of the digital inputs. The range of the analog signal is from VDD to VEE.
Applications
· · · · · · Key systems PBX systems Mobile radio Test equipment /instrumentation Analog/d i g i t a l multiplexers Audio/Vid e o switching
STROBE
DATA RESET
VDD
VEE
VSS
1 AX0
1 ················
AX1 AX2 AY0 AY1 AY2 64 64
6 to 64 Decoder
Latches
8x8 Switch Array
Xi I/O (i=0-7)
···················
Yi I/O (i=0-7)
Fi g u r e 1 - Functional Block Diagram
3-15
MT8808
ISO-CMOS
AY2 STROBE VEE DATA VSS X0 X2 X4 X6 RESET Y7 Y6 Y5 Y4
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
AY1 AY0 AX2 AX1 AX0 X1 X3 X5 X7 VDD Y0 Y1 Y2 Y3
4 3 2 1 28 27 26
·
DATA VEE STROBE AY2 AY1 AY0 AX2
28 PIN PLASTIC DIP
Figure 2 - Pin Connections
Pin Description
Pin # 1 2 Name AY2 AY2 Address Line (Input). Description
STROBE STROBE (Input): enables function selected by address and data. Address must be stable before STROBE goes high and DATA must be stable on the falling edge of the STROBE. Active High. VEE DATA VSS X0, X2, X4, X6 RESET Y7 - Y0 VDD X7, X5, X3, X1 AX0AX2 Negative Power Supply. DATA (Input): a logic high input will turn on the selected switch and a logic low will turn off the selected switch. Active High. Digital Ground Reference . X0, X2, X4 and X6 Analog (Inputs/Outputs): these are connected to the X0, X2, X4 and X6 rows of the switch array. Master RESET (Input): this is used to turn off all switches. Active High. Y7 - Y0 Analog (Inputs/Outputs): these are connected to the Y0 - Y7 columns of the switch array. Positive Power Supply. X7, X5, X3 and X1 Analog (Inputs/Outputs): these are connected to the X7, X5, X3 and X1 rows of the switch array. AX0 - AX2 Address Lines (Inputs).
3 4 5 6-9 10 11-18 19 20-23 24-26 27,28
AY0, AY1 AY0 and AY1 Address Lines (Inputs).
3-16
Y6 Y5 Y4 Y3 Y2 Y1 Y0
12 13 14 15 16 17 18
VSS X0 X2 X4 X6 RESET Y7
5 6 7 8 9 10 11
25 24 23 22 21 20 19
AX1 AX0 X1 X3 X5 X7 VDD
28 PIN PLCC
ISO-CMOS
Functional Description
The MT8808 is an analog switch matrix with an array size of 8 x 8. The switch array is arranged such that there are 8 columns by 8 rows. The columns are referred to as the Y inputs/outputs and the rows are the X inputs/outputs. The crosspoint analog switch array will interconnect any X I/O with any Y I/O when tur ned on and provide a high degree of isolation when turned off. The control memory consists of a 64 bit write only RAM in which the bits are selected by the address inputs (AY0-AY2, AX0-AX2). Data is presented to the memory on the DATA input. Data is asynchro-nously written into memory whenever the STROBE input is high and is latched on the falling edge of STROBE. A logical "1" written into a memory cell turns the corresponding crosspoint switch on and a logical "0" turns the crosspoint off. Only the crosspoint switches corresponding to the addressed memor y location are altered when data is written into memor y. The remaining switches retain their previous states. Any combination of X and Y inputs/ outputs can be interconnected by establishing appropriate patterns in the control memory. A logical "1" on the RESET input will asynchronously retur n all memory locations to logical "0" turning off all crosspoint switches. Two voltage reference pins (VSS and VEE) are provided for the MT8808 to enable switching of negative analog signals. The range for digital signals is from VDD to VSS while the range for analog signals is from VDD to VEE. VSS and VEE pins can be tied together if a single voltage reference is needed.
MT8808
Address Decode
The six address inputs along with the STROBE are logically ANDed to form an enable signal for the resettable transparent latches. The DATA input is buffered and is used as the input to all latches. To write to a location, RESET must be low while the address and data are set up. Then the STROBE input is set high and then low causing the data to be latched. The data can be changed while STROBE is high, however, the corresponding switch will turn on and off in accordance with the DATA input. DATA must be stable on the falling edge of STROBE in order for correct data to be written to the latch.
3-17
|
|
