Datasheet text preview:
MARCH 1994 QC6305 Series
DS3887-1.4
QC6305 Series
4 to 15MHz TC-VCXO QUARTZ CRYSTAL OSCILLATORS
The QC6305 temperature compensated voltage controlled crystal oscillator provides a compact highly stable frequency source which can be tuned to nominal in a rugged standard package size. This is particularly designed for use in professional telecommunications applications.
FEATURES
I High Stability I Low Power I CMOS and TTL Versions Available I Standard Pin Spacing
ELECTRICAL SPECIFICATION
FREQUENCY RANGE FREQUENCY TOLERANCE FREQUENCY STABILITY With Temperature Relative to 25°C ref: 1A-1A (-40°C to +85°C) ref: 1A-3A (-40°C to +85°C) ref: 1B-1A (-10°C to +70°C) ref: 1B-3A (-10°C to +70°C) Ageing per year ±1.2 ppm Max. ±1.2 ppm Max. ±1.0 ppm Max. ±1.0 ppm Max. ±0.3 ppm Max. ±1.0 ppm Max. 4 to 15 MHz Tuneable to nominal.
With Supply Voltage Change of ±10% With Time FREQUENCY ADJUSTMENT Maximum Adjustment Possible Method ±10 ppm
Frequency adjustment is achieved by a 10kohm potentiometer and a 10kohm resistor connected as shown below.
External tuning can be achieved by applying a suitable tuning voltage to Pin 1 Tuning voltage for nominal frequency Range: Min. +7 ppm Max. -7 ppm Increasing tuning voltage VT will decrease output frequency Tuning Slope At nominal frequency At nominal frequency 13 ppm/volt Min. 40 ppm/volt Max. 0.8 V 1
QC6305 Series
OUTPUT
CMOS
Mark Space Ratio Maximum Load Voltage Rise/Fall Time Logic `0' Logic `1' Between Vih and Vin At 0.5 Vcc 70:30 to 30:70 50 pF 0.1 Vcc Max. 0.9 Vcc Max. 20 nsec Max.
TTL
Mark Space Ratio Fan Out Voltage Rise/Fall Time At 1.4 V LSTTL gates Logic `0' Logic `1' Rise 0.8 V to 2.0V Fall 2.0 V to 0.8 V From Output to +10V Version <6.0MHz <9.0MHz <13.0MHz 13.0MHz OPERABLE TEMPERATURE RANGE Ref: 1A-1A Ref: 1A-3A Ref: 1B-1A Ref: 1B-3A SUPPLY Voltage Current Unloaded 9 to 12 V 6 mA Max. -40°C to +85°C -40°C to +85°C -10°C to +70°C -10°C to +70°C 60:40 to 40:60 5 Max. 0.4 V Max. 2.4 V Max. 15 nsec Max. 15 nsec Max. CMOS Load 1B-1A, 1A-1A 680 560 470 330 TTL Load 1B-3A, 1A-3A 1K5 1K5 1K5 1K2
PULL UP RESISTORS
ENVIRONMENTAL SPECIFICATION
BUMP SEVERITY Condition Method Condition Method Condition Method Condition Method Condition Method Condition Method 390m/s2 6 x 4000 bumps IEC publication 68.2.29 100m/s2 0.75mm, 10-500Hz 2 hours in main directions IEC publication 68.2.6 -55°C to +85°C 5 cycles 15min at each extreme temperature IEC publication 68.2.14 issue 3 test Na 6 cycles IEC publication 68.2.30 issue 3 test Q6 56 days IEC publication 68.2.3 Solder bath temperature 350 ±10°C IEC publication 68.2.20 issue 3 test 3.2.4
VIBRATION TEST
TEMPERATURE CYCLING
Followed by moisture resistance
Damp Heat
Resistance to Heat
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QC6305 Series
Helium Leak Test Requirement Method Requirement Method Condition Method Leak rate <1x10-7cc/sec IEC publication 68.2.17 test Qk No bubbles IEC publication 68.2.17 test Qc Solder globule method +235°C IEC publication 68.2.20 -55°C to +105°C
Bubble Test
SOLDERABILITY
STORAGE TEMPERATURE
MECHANICAL SPECIFICATION
WEIGHT (Typical) OUTLINE DRAWING (Dimensions in mm) 18 gms
36.0 MAX.
26.7 MAX.
10.5 MAX.
0.38 MAX.
7.5 ±1.0
25.4
0.8 DIA.
3
4
Pin Connections
2 17.8
1
5
1 2 3 4 5
Freq Adjust Ref Voltage +VE O/P E
MARKING
The following information is indelibly marked on the top surface of each device and on each primary package: 1. GPS Logo 2. The nominal output frequency in 'MHz' 3. The type number 4. The date code in accordance with Clause 22 of BS9000: Part 1: 1981 5. The primary package is marked to indicate device static sensitivity 6. Customised marking is available on request
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