|
Details, datasheet, quote on part number:ZNBG3010Q16
| |
Datasheet text preview:
FET BIAS CONTROLLER AND POLARITY SWITCH
ISSUE 1 - FEBRUARY 1998 DEVICE DESCRIPTION
The ZNBG series of devices are designed to meet the bias requirements of GaAs and HEMT FETs commonly used in satellite receiver LNBs, PMR cellular telephones etc. with a minimum of external components. With the addition of two capacitors and a resistor, the devices provide drain voltage a n d current control for three external g r o u n d e d source FETs, generating the regulated negative rail required for FET gate biasing whilst operating from a single supply. This negative bias, at -3 volts, can also be used to supply other external circuits. The ZNBG3010/11 includes bias circuits to drive up to three external FETs. A control input to the device selects either one of two F E T s as operational, the third FET is permanently active. This feature is particularly used as an LNB polarisation switch. Drain current setting of the ZNBG3010/11 is user selectable over the range 0 to 15mA, this is achieved with addition of a single resistor. The series also offers the choice of drain voltage to be set for the FETs, the ZNBG3010 gives 2.2 volts drain whilst the ZNBG3011 gives 2 volts.
ZNBG3010 ZNBG3011
These devices are unconditionally stable over the full working temperature with the FETs in place, subject to the inclusion of the recommended gate and drain capacitors. T h e s e ensure RF stability and minimal injected noise. It is possible to use less than the devices full complement of FET bias controls, unused drain and gate connections can be left open circuit without affecting operation of the remaining bias circuits. In order to protect the external FETs the circuits have been designed to ensure that, u n d e r any conditions including power up/down transients, the gate drive from the bias circuits cannot exceed the range -3.5V t o 1V. Furthermore if the negative rail e x p e r i e n c e s a fault condition, such as overload or short circuit, the drain supply to the FETs will shut down avoiding excessive current flow. The ZNBG3010/11 are available in QSOP16 for the minimum in device size. Device operating temperature is -40 to 70°C to suit a wide range of environmental conditions.
FEATURES
APPLICATIONS
· · · · · · · · ·
Provides bias for GaAs and HEMT FETs Drives up to three FETs Dynamic FET protection Drain current set by external resistor Regulated negative rail generator requires only 2 external capacitors Choice in drain voltage Wide supply voltage range Polarisation switch for LNBs QSOP surface mount package
· · ·
Satellite receiver LNBs Private mobile radio (PMR) Cellular telephones
4-114
ZNBG3010 ZNBG3011
ABSOLUTE MAXIMUM RATINGS
Supply Voltage Supply Current Input Voltage (VPOL) Drain Current (per FET) (set by RCAL) Operating Temperature Storage Temperature -0.6V to 12V 100mA 25V Continuous 0 to 15mA -40 to 70°C -50 to 85°C Power Dissipation (Tamb= 25°C) QSOP16 500mW
ELECTRICAL CHARACTERISTICS TEST CONDITIONS (Unless otherwise stated):Tamb= 25°C,VCC=5V,ID=10mA (RCAL=33k)
SYMBOL PA RAMETER CONDITIONS MI N. V CC I CC Supply Voltage Supply Current ID1 to ID3=0 ID2 and ID3=10mA, VPOL=14V ID1 and ID3=10mA, VPOL=15.5V -3.5 -3. 0 5 LIMITS TYP . MA X . 10 10 30 30 -2 -2 0. 02 0. 005 200 3 50 80 0 V mA mA mA V V Vp kp k Vp kp k kHz µA UNI TS
V SUB
Substrate Voltage ISUB=0 (Internally generated) ISUB=-200µA Output Noise Drain Voltage Gate Voltage Oscillator Frequency CG=4.7nF, CD=10nF CG=4.7nF, CD=10nF
E ND E NG fO IGO
GATE CHARACTERISTICS
Output Current Range I Dx (mA) VG1O VG1L VG1H VG2O VG2L VG2H VG3L VG3H Output Voltage Gate 1 Off Low High Output Voltage Gate 2 Off Low High Output Voltage Gate 3 Low High VP O L (V) IGOx (µ A ) -3.5 -3.5 0.4 -3.5 -3.5 0.4 -3.5 0.4 -2. 9 -2. 9 0 . 75 -2. 9 -2. 9 0 . 75 -2. 9 0 . 75 -2.0 -2.0 1. 0 -2.0 -2.0 1. 0 -2.0 1. 0 V V V V V V V V -30 20 00
ID1=0 VPOL=14 IGO1=-10 ID1=12 VPOL=15.5 IGO1=-10 ID1=8 VPOL=15.5 IGO1=0 ID2=0 VPOL=15.5 IGO2=-10 ID2=12 VPOL=14 IGO2=-10 ID2=8 VPOL=14 IGO2=0 I D 3= 1 2 I D 3= 8 IGO3=-10 IGO3=0
4-115
ZNBG3010 ZNBG3011
SYMBOL PARAMETER CONDITIONS MIN. LIMITS TYP. MA X . UNI TS
DRAIN CHARACTERISTICS
ID I DV I DT VD 1 Current Current Change with VCC with Tj VCC= 5 to 10V Tj=-40 to +70°C 2.0 1.8 2.0 1.8 2.0 1.8 8 10 0.2 0 . 05 2.2 2.0 2.2 2.0 2.2 2.0 0.5 50 10 10 2. 4 2. 2 2. 4 2. 2 2. 4 2. 2 12 mA %/V %/°C V V V V V V %/V ppm µA µA
Drain 1 Voltage:High Z NBG3 010 ID1=10mA, VPOL=15.5V ID1=10mA, VPOL=15.5V Z NBG3 011 Drain 2 Voltage:High Z NBG3 010 ID2=10mA, VPOL=14V Z NBG3 011 ID2=10mA, VPOL=14V Drain 3 Voltage:High Z NBG3 010 ID3=10mA, VPOL=15.5V ID3=10mA, VPOL=15.5V Z NBG3 011 Voltage Change with VCC with Tj Leakage Current Drain 1 Drain 2 VCC= 5 to 10V Tj=-40 to +70°C VD1=0.1V, VPOL=14V VD2=0.1V, VPOL=15.5V
VD 2
VD 3
V DV VDT I L1 I L2
POLARITY SWITCH CHARACTERISTICS
IPOL VTPOL TSPOL Notes: 1. The negative bias voltages specified are generated on-chip using an internal oscillator. Two external capacitors, CNB and CSUB, of 47nF are required for this purpose. 2. The characteristics are measured using an external reference resistor RCAL of value 33k wired from pins RCAL to ground. 3. Noise voltage is not measured in production. 4. Noise voltage measurement is made with FETs and gate and drain capacitors in place on all outputs. CG, 4.7nF, are connected between gate outputs and ground, CD, 10nF, are connected between drain outputs and ground. Input Current Threshold Voltage Switching Speed VPOL=25V (Applied via RPOL=10k (Applied via RPOL=10k 10 14 20 1 4. 7 5 40 15 . 5 100 µA V µs
4-116
|
|
