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Details, datasheet, quote on part number:ZR36050
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Datasheet text preview:
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ZR36050
ADVANCE INFORMATION
JPEG IMAGE COMPRESSION PROCESSOR
FEATURES
s Implements JPEG Baseline image compression and expansion, including: - DCT/IDCT operations - Quantization - Variable length coding/decoding s Full support of the JPEG Baseline standard, including: - Bit and byte stuffing - JPEG markers including restart (RST), application (APP), and comment (COM) s JPEG Lossless compression and expansion DMA/SLAVE bus interface s Motion video (30 frames/sec) compression/expansion capability for CCIR resolution (720 x 480) s "Fast Preview" option - Preview of "thumbnail" version of images (up to 25x faster) s Bit rate control option - Guarantees compressed image file size s Low cost solution - Low cost single chip - Suppor t for inexpensive memories - Requires minimal host intervention s TTL compatible s 27 and 21 MSamples/sec data-rate Standby mode for very low power consumption s 100-pin plastic quad flat-pack (PQFP) packaging
APPLICATIONS
s s s s Computer and multimedia add-in boards Full-motion video compression/expansion Digital still cameras and peripherals Security and industrial systems s s s s Videophones and color FAX machines Color printers and scanners Fixed bit rate image transmission devices Cost-sensitive image compression systems
GENERAL DESCRIPTION
The ZR36050 is a high-speed JPEG Image Compression Proc e s s o r that performs the algorithm specified by the JPEG Baseline and JPEG Lossless standards for high-quality image compression and expansion of continuous-tone color or monoc h r o m e images. The ZR36050 performs Discrete Cosine Transform (DCT), quantization and variable-length encoding for image compression (coding), and the corresponding inverse operations for expansion (decoding). I n the JPEG Baseline encoding operation, the ZR36050 performs the DCT operation on 8 x 8 blocks of image data, converting image data into its spatial frequency components, and quantizes them using a user defined "quantization table." Because the human visual system is less sensitive at the higher spatial frequencies, these higher frequency components can be quantized more coarsely than the lower-frequency components, with negligible effect on image quality. The coarser quantization of high-frequency coefficients results in long strings of zero valued quantized coefficients, when the 8x8 blocks are scanned in zigzag order. The scanned coefficients are characterized in terms of their nonzero values and the zero run lengths. As a result, a long string of zeroes is coded as a single number. The ZR36050 then performs Huffman coding using user-defined Huffman tables, whereby bit patterns of diff e r e n t lengths code the nonzero values (values that occur frequently use the shortest codes; while those that infrequently
ZORAN Corporation
occur use the longest codes). These techniques greatly reduce the amount of memory needed to store an image. In the decoding operation, the compressed data is decoded (the i n v e r s e of the Huffman and the zigzag modified-run-length coding), and dequantized. A 2-D inverse Discrete Cosine Transf o r m is performed on the DCT coefficients, resulting in an expanded image.
+5V
12 8
PIXEL PIXEL Interface DSYNC EOS STOP COMP RESET STDBY ZR36050 FREEZE JPEG IMAGE END COMPRESSION CL PROCESSOR CLKEN COEF CSYNC
CODE COE CWE CCS CAEN CBUSY
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Compressed Data Interface
Control
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DATA
10
ADDR RD WR CS INT DINT DREQ DACK
DCT Coefficient Output
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Host Interface
Clock
CLK_IN
VSS
Figure 1. ZR36050 Logical Pinout s
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1705 Wyatt Drive
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Santa Clara, CA 95054
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(408) 986-1314
FAX (408) 986-1240
August 1993
his document was created with FrameMaker 4.0.4
ADVANCE INFORMATION
ZR36050
In addition to the JPEG Baseline, the ZR36050 supports a subset of JPEG Lossless standard. The ZR36050 performs one dimensional differential prediction followed by variable-length encoding for JPEG Lossless compression, and the corresponding inverse operations for JPEG Lossless expansion. T h e ZR36050 maintains full compatibility with the JPEG Baseline standard. The unique ability to perform bit rate control. Bit rate control capability allows the user to preset the size of a compressed image file. This capability is important because without bit rate control, the size of a compressed image is highly data dependent for a given set of quantization tables (images with fine detail generate considerably larger files than files generated from smooth images). The ability to perform bit rate control is critical for applications where predictable file sizes for compressed images is desired, or where the time allocated to transmit an image across a communications network is fixed. The compressed image file size is constrained to be no greater than a user specified target, and is typically kept within a range of 95% to 100% of this target. The bit rate control feature relies on a two pass algorithm for its operation. The ZR36050 has the ability to generate a "thumbnail" version of an image for "Fast Preview." This thumbnail image is a 1/64 scale version of the image, and is generated up to 25 times faster than full image expansion. The thumbnail image is generated from the JPEG Baseline compressed data, and eliminates the need for a separately encoded and stored thumbnail image. This feature is particularly useful for previewing large databases of images. The ZR36050 operates as a dedicated processor requiring only minimal host intervention. The host processor controls the opera t i o n of the device by writing parameter values into the Z R 3 6 0 5 0 ' s Internal Memory. Once initialized, the ZR36050 operates continuously until it has completed the compression or expansion of the image. Since the ZR36050 fully complies with the JPEG Baseline standard, the compressed data bit-stream generally requires no intervention by the host. Full JPEG capability also allows for the interchange of files created by other JPEG imaging systems with files generated by systems using the ZR36050. The ZR36050 is useful for a wide range of motion and still video applications. For example, a typical multimedia application (30 seconds of video at 10 frames/sec and 320 x 240 resolution) would require 69 Mbytes of storage in uncompressed form. With compression using the ZR36050, the requirement can be reduced to 2.9 Mbytes, making storage feasible on a personal computer hard disk. Similarly, for digital still camera applications, the memory requirement can be reduced from a 22 Mbyte hard disk to a 1 Mbyte memory card for storage of twenty 768 x 480 compressed images. The ZR36050 is fabricated with an advanced low-power CMOS technology, making it suitable for use in low-power, cost-sensitive applications. The device is available in a 100-pin Plastic Quad Flat Pack (PQFP).
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ADVANCE INFORMATION
ZR36050
Table 1. Signal Description1, 2
Type3 Signal VCC VSS CLK_IN Encode S S I Decode S S I Description +5 volt Power supply. All VCC pins must be connected to +5V. Ground. All VSS pins must be connected to GND. Data Transfer Clock. Provides data transfer timing for the device. All timing is referenced to the rising edge of this clock. Reset. This active-low input signal resets all the internal controls and places the ZR36050 in the Idle state. RESET can be activated only when CLKEN is asserted and must remain active for a minimum of four CLK_IN cycles. The STATUS_0, INT_REQ_0, and INT_REQ_1 register bits are reset by this signal. The STATUS_1 bits except the END bit are reset; the END bit is set. RESET initializes the ZR36050 to the compression mode, and activates END, STOP and COMP. RESET can be activated during the Standby state; in this case the device draws normal current as long as RESET is active. STDBY I I Standby. This active-low input signal places the ZR36050 in the Standby state. If CLKEN is active, only the internal clock circuit consumes power. If CLKEN is inactive in the Standby state, the device power consumption is further reduced. The ZR36050 should be switched to the Standby state only when it is in the Idle state: after activation of a RESET and prior to loading the Internal Memory, or after the ZR36050 issues an END. If CLKEN is active, then STDBY should be deasserted at least four CLK_IN cycles before accessing the Internal Memory. RESET can be activated during the Standby state, only when CLKEN is active. Reading from or writing to the Internal Memory during the Standby state is prohibited. CLKEN I I Clock Enable. This active-high input signal enables the data transfer clock CLK_IN, and the internal PLL that generates an internal double-frequency clock. When inactive, this signal reduces power further in the Standby state by deactivating the internal clock. The frequency of CLK_IN must be stable before CLKEN is activated. Furthermore, 5000 CLK_IN cycles are required for the PLL to stabilize, after CLKEN has been activated and before the device is ready for operation. If the frequency of CLK_IN is changed without turning off the power, then CLKEN must be reactivated. When STDBY is high, this pin should also be high. For systems in which the 5000 CLK_IN recovery time is not significant, the STDBY and CLKEN pins can be tied together to the external standby signal. FREEZE I I Freeze. This active-low input signal freezes all chip operations. FREEZE is sampled on the rising edge of CLK_IN. Immediately after FREEZE is sampled, all buses float and all activities of the ZR36050 are frozen in their current state. All activities resume normally following the deassertion of FREEZE. End Of Process. This active-low output signal indicates the normal end of an encoding or decoding process. If an encoding process ends because of an overflow, END is not activated. END is activated after activation of RESET and at the completion of an encoding or decoding process. It stays activated until a GO command is issued or the STATUS_1 register in the Internal Memory is read. 1. The DATA, CODE, PIXEL, and COEF buses have internal pull-downs that provide 50 microamps of pull-down current at 0.4 volts. 2. The control pins: DSYNC, EOS, STOP, END, CL, CSYNC, COE, CWE, CCS, CAEN, INT, DINT, DREQ and COMP, have internal pull-up devices that provide 50 microamps at 2.4 volts. These pull-ups are turned on only when STDBY is active but RESET is inactive. When STDBY is active together with RESET, the above control pins float. 3. I = Input, O = Output, B = Bidirectional, S = Supply.
RESET
I
I
END
O
O
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