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Part: SB3000
Category:
Communication
-> Network
-> Ethernet/DS1/E1 (T1/E1)
Description: 10 GBPS Ultra Low Power CMOS Serial Transceiver Macro
Company: Silicon Bridge
Datasheet: Download SB3000 datasheet File size : 331 kB
Request For quote: Find where to buy SB3000
Datasheet text preview:
SILICON BRIDGE
SB3000 PRODUCT BRIEF
SB3000 - 10Gbps Serial Low Power 0.13um TSMC CMOS Programmable Transceiver Macro Cell
FEATURES
· Compliant with 10Gbps Ethernet IEEE P802.3ae, and XFI electrical specification · 9.9 - 10.7 Gbps serial transmission baud rate · 32/64-bit parallel interface · Integrated limiting amplifier with bypass option · 32/64:1 MUX and 1:32/64 DMUX · Integrated adaptive equalization for 10Gbps data, low noise Clock/Data Recovery (CDR), and 10GHz VCO · Retimed serial repeater mode support · Optional 10GHz transmit clock output · Single reference 1/16 or 1/64 input clock · Lock detect, frequency detect, and loss of signal · MDC/MDIO serial programming interface · Built-in self test (BIST) including PRBS generators/checkers, serial, parallel, and PCS loop backs · Power down mode · 1.5V single power supply · Power dissipation: 400mW typical · Available in 0.13um TSMC CMOS technology
BENIFITS
· Compliant with the industry standard specifications · Highly versatile VCO enabling wide range of data rate without the need to center the VCO · Highly integrated and overall lower system cost · Low power dissipation · Good jitter performance · Integrated BIST for convenient system debugging and production testing
APPLICATIONS
· · · · 10Gbps Ethernet Test equipment 10Gbps seial backplane Direct interface to XFP module
Figure 1.0 Typical Application Diagram
SB1010
3.125G XCVR 3.125G XCVR 3.125G XCVR 3.125G XCVR
ASIC Protocol/ XGMAC/16-bit SB3000 XGMII ASIC I/F
xfi I/F
XFP SB320 Module
HOST BOARD
Serial backplane SB1010
3.125G XCVR 3.125G XCVR 3.125G XCVR 3.125G XCVR
ASIC
XGMII
RTL CODE
CHASIS
Revision: 1.1 August 22, 2002
Silicon Bridge Inc.,
41688 Christy Street, Fremont, CA 94538 (510)-360-8888
1
SILICON BRIDGE
SB3000 PRODUCT BRIEF
1.0 General Description
SB3000 Block Diagram
RXCLK
10Gbps RX
DMUX
CDR
DIV
EQZ+LA
32/64-bit Interface
PRBS CKR PRBS GEN
TX PLL
REFCLK
MUX
TX Driver
10Gbps TX
10GHz Clock
SB3000 is a very low power and highly integrated and programmable CMOS serial 10Gbps transceiver macro cell. The core integrates a transmit phase lock loop (TXPLL), clock data recovery (CDR), multiplexer (MUX), demultiplexer (DMUX), programmable equalizer (EQZ), limiting amplifier (LA), current mode logic (CML) driver, and a 32/64-bit parallel interface. It is ideal for 10Gbps serial host system ASIC integration. Together with the SB1010 macro cell, the designer is able to implement a complete 10Gbps system with backplane capability in a single ASIC at a very low cost. In the transmit path, the device takes in a 16-bit data and multiplexes it into a 10Gbps serial output data stream. The on-chip phase lock loop (PLL) references a 156MHz/622MHz external crystal oscillator and generates a clean system and 10GHz clocks. In the receive path, the device accepts the serial NRZ data, passes it to the equalizer and limiting amplifier. The clock and data are recovered with the on chip CDR, and outputed to the 32-bit or 64bit parallel interface. The SB3000 integrates the built-in self test (BIST) functions including PRBS generator/checker, serial and parallel loopback, and JTAG. These features enable the user to perform advance system level testing without extra cost. It is available in TSMC 0.13um CMOS technology and can operate from a single 1.5V supply.
Revision: 1.1 August 22, 2002
Silicon Bridge Inc.,
41688 Christy Street, Fremont, CA 94538 (510)-360-8888
2
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