Details, datasheet, quote on part number: STK55C2081
PartSTK55C2081
CategoryOptoelectronics => Drivers/Controllers => LCDs => LCD Controllers/Drivers
TitleLCD Controllers/Drivers
Description65 Segments And 32 Commons Output Pins For LCD Driver.
CompanySyntec Semiconductor
DatasheetDownload STK55C2081 datasheet
  

 

Features, Applications

Specification

* Operating voltage 2.5V-6.5V * Operating current : under 3V. * Dual frequency - 32.768 KHz for LCD & 0.5 second timer interrupt. RC or resonator oscillator for system clock. - CPU clock is half of system clock. * Built-in 2K bytes RAM, including LCD display RAM. * Built-in 64K bytes ROM with 16K bytes per bank. *Two chip enable signals. One can be expanded to 512K bytes with 16K per bank, and the other one can be expanded to 2M bytes with 16K per bank. * One 0.5 second pre-divider timer interrupt with start/stop control. * 2 output ports for key matrices - 14 pins for port 1, also used as address pins. - 4 input pins with wake-up interrupt for port 2. - Built-in pull-up resistors for port * 8-bit timer with 8-bit prescale counter, both are auto-reloadable. System clock 1/2 8-bit counter (prescaler) 8-bit counter (prescaler) CPU clock * 8-bit sound generator with 8-bit prescaler, both are auto-reloadable. * Two LCD modes - LCD mode : 80 segments, 16 commons, 1/5 bias, 1/16 duty and 64 Hz frame frequency. - LCD mode : 65 segments, 32 commons, 1/5 bias, 1/32 duty and 64 Hz frame frequency. * Selectable 64 Hz Interrupt by NMI. * Timers and port 2 enable IRQ Interrupt. LCD Controller

* Timer range is programmable. * One output for the speaker. - 2 KHz or 4 KHz signal with two different envelopes are selectable for sound output. * One UART serial port with even parity check bit added after MSB for error detecting. * The internal ROM can be disabled and the corresponding memory area are mapped to the highest banks of external ROM. * Sleep mode : LCD off , crystal & system oscillator stop, Vdd=3V, Idd < 1 µA. Stand-by mode : LCD on and system oscillator stop, Vdd=3V, Idd < 80 µA. LCD off and system oscillator stop, Vdd=3V, Idd < 8 µA.

Data Bank Translator Organizer Hand-held game
UART 16-bit Timer A0-A15 Address decoder Bank control D0-D7 Sound generator

 

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