Details, datasheet, quote on part number: STK88C2441
PartSTK88C2441
CategoryCommunication => Telephony => Voice Processors
Description60" Adpcm Voice Controller
CompanySyntec Semiconductor
DatasheetDownload STK88C2441 datasheet
  

 

Features, Applications

* Operating voltage 5.5V. * Maximum CPU operating frequency 2.7V. * Provide X'tal or RC oscillator. Both can run at high speed or slow speed(low power). RC oscillator can detect internal or external resister automatically. * Support 4M bytes program and data ROM. 256K bytes of them are built-in. * Built in 128 bytes RAM. * I/O port. 24 I/O pins. of 24 pins with wake up function. * Six 8-bit timers. * Four channels for voice or melody processing. * Two DACs for voice or melody playing. Also, internal programming for single DAC playing. * One pair of PWM for voice or melody playing. * Eight interrupt sources : NMI - Can be Watchdog Timer interrupt IRQ0 - Timer 0 interrupt IRQ1 - Timer 1 interrupt IRQ2 - Timer 2 interrupt IRQ3 - Timer 3 interrupt IRQ4 - Timer 4 interrupt IRQ5 - External interrupt IRQ6 - Base Timer interrupt IRQ7 - Timer 5 interrupt

Pin Name A0-A13 D0-D7 CEB /EXTROM PWM1 PWM2 VCOCAP RXOSC XOSC2 XR RESB TESTB VDD VDD(PWM) GND GND(PWM) I/O O I/O

Function description 8-bit I/O pins for port 1 with wake-up interrupt I/O 8-bit I/O pins for port 2. 8-bit I/O pins for port 3. PC0-PC7 will changed to BANK0BANK7 output if bank number is less than or /DIROM=0. Address bus. Data bus. External ROM chip enable. =0 Disable internal ROM. =1 Enable internal ROM if bank number is greater than $EF. Current output port Current output port Voltage output port Voltage output port PLL used. X'TAL or Ring osc pad X'TAL pad Bias input for RC oscillator. System reset pin; internal pull_high. Test pin; internal pull_high. Power for PWM module Ground for PWM module

1) RAM 0000-007F for data storage. 0100-017F for stack and data area.. This area is overlapped with 0000-007F. 2) ROM Max. 4M bytes for program and speech data area. This area splits into 256 banks (0~255). There are 16k bytes for every bank. The last 16 banks (240-255) are built-in. If /DIROM=1 and bank number is greater than $EF, then internal ROM is read. /DIROM=0 or bank number is less than

$F0, then external ROM is read. Internal ROM related address shows below: BANK numberCPU address Internal ROM address bank 8000-BFFF 00000-03FFF bank 8000-BFFF 04000-07FFF bank 8000-BFFF 08000-0BFFF............................................................................... bank 8000-BFFF 3C000-3FFFF (bank 3C000-3FFFF) If RESET or IRQ or NMI or Bank address=FF, ROM address will indicate to 3C000-3FFFF. FFFF, FFFE - IRQ vector. FFFD, FFFC - RES vector. FFFB, FFFA - NMI vector for watchdog interrupt.

Clear timer 0 flag. Clear timer 1 flag. Clear timer 2 flag. Clear timer 3 flag. Clear timer 4 flag. Clear External flag. Clear Base Timer flag. Clear timer 5 flag..


 

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