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Part: 5500A080010
Category:
Microprocessors
Description: 256 Kbytes 800 MHZ Crusoe Processor
Company: Transmeta
Datasheet: Download 5500A080010 datasheet File size : 56 kB
Request For quote: Find where to buy 5500A080010
Datasheet text preview:
TM5500/TM5800 Data Book
Crusoe Processors Described in this Document Processor SKU TM5800-933 CoolRun80 DDR/SDR TM5800-867 CoolRun80 DDR/SDR TM5800-800 100°C DDR/SDR TM5500-800 100°C DDR/SDR TM5800-733 100°C DDR/SDR Package Marking L2 Cache Max Core Core Frequency Voltage 0.90-1.35 V Tj Max 80/100 °C TDP 7.5 W Memory Interface DDR Yes SDR Yes
Version 1.0
5800C093310 512 KBytes 933 MHz
5800C086710 512 KBytes 867 MHz
0.90-1.35 V
80/100 °C
7.5 W
Yes
Yes
5800A080010 512 KBytes 800 MHz
0.90-1.30 V
100 °C
6.0 W
Yes
Yes
5500A080010 256 KBytes 800 MHz
0.90-1.30 V
100 °C
6.0 W
Yes
Yes
5800A073310 512 KBytes 733 MHz
0.90-1.30 V
100 °C
5.5 W
Yes
Yes
February 6, 2003
TM5500/TM5800 Version 1.0 Data Book
February 6, 2003
CrusoeTM Processor Model TM5500/TM5800 Version 1.0 Data Book Revision 1.00 Revision History: 0.1 0.2 0.3 1.00 Preliminary first draft June 13, 2001 - first release June 26, 2002 - added 867, 900 MHz SKUs, updated memory interface descriptions, updated LongRun tables February 6, 2003 - updated SKUs to current production SKUs
Property of: Transmeta Corporation 3990 Freedom Circle Santa Clara, CA 95054 USA (408) 919-3000 http://www.transmeta.com The information contained in this document is provided solely for use in connection with Transmeta products, and Transmeta reserves all rights in and to such information and the products discussed herein. This document should not be construed as transferring or granting a license to any intellectual property rights, whether express, implied, arising through estoppel or otherwise. Except as may be agreed in writing by Transmeta, all Transmeta products are provided "as is" and without a warranty of any kind, and Transmeta hereby disclaims all warranties, express or implied, relating to Transmeta's products, including, but not limited to, the implied warranties of merchantability, fitness for a particular purpose and non-infringement of third party intellectual property. Transmeta products may contain design defects or errors which may cause the products to deviate from published specifications, and Transmeta documents may contain inaccurate information. Transmeta makes no representations or warranties with respect to the accuracy or completeness of the information contained in this document, and Transmeta reserves the right to change product descriptions and product specifications at any time, without notice. Transmeta products have not been designed, tested, or manufactured for use in any application where failure, malfunction, or inaccuracy carries a risk of death, bodily injury, or damage to tangible property, including, but not limited to, use in factory control systems, medical devices or facilities, nuclear facilities, aircraft, watercraft or automobile navigation or communication, emergency systems, or other applications with a similar degree of potential hazard. Transmeta reserves the right to discontinue any product or product document at any time without notice, or to change any feature or function of any Transmeta product or product document at any time without notice. Trademarks: Transmeta, the Transmeta logo, Crusoe, the Crusoe logo, Code Morphing, LongRun, and combinations thereof are trademarks of Transmeta Corporation in the USA and other countries. Other product names and brands used in this document are for identification purposes only, and are the property of their respective owners. Copyright © 2001-2003 Transmeta Corporation. All rights reserved.
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February 6, 2003
Table of Contents
List of Tables ......... 5 List of Figures ........ 7 Introduction ............ 9 Chapter 1 Functional Interface Description ......... 13 1.1 Power and Thermal Management ............ 13 1.1.1 Power Management States ....... 13 1.1.2 LongRun Power Management ... 16 1.1.3 LongRun Thermal Management ......... 17 1.1.4 Processor Thermal Monitoring... 18 1.1.5 SDRAM Power Saving Modes ... 18 1.2 Memory Interfaces ........... 19 1.2.1 DDR SDRAM Interface ..... 19 1.2.2 DDR Memory Interface Constraints.......... 20 1.2.3 DDR Interface Reference Voltage Circuit .......... 20 1.2.4 SDR SDRAM Interface ..... 21 1.2.5 SDR Memory Interface Constraints .......... 22 1.3 System Memory Configurations ...... 23 1.3.1 Recommended Memory Configurations ............ 23 1.3.2 Example Memory Configurations........ 25 1.3.3 Code Morphing Software Memory ...... 26 1.4 PCI Interface ........... 27 1.4.1 PCI Bus Commands ......... 27 1.4.2 Bus Arbitration ... 28 1.5 Southbridge Sideband Signals........ 29 1.6 Serial Interfaces ...... 29 1.7 Clocks ...... 30 1.8 JTAG Test Interface ......... 31 1.9 Supply Voltages ...... 31 1.10 Core Voltage Regulator VRDA Interface.. 31 1.11 Power-On Sequence ........ 32 Signal Descriptions and Ballouts ............. 33 2.1 Signal Descriptions .......... 33 2.2 I/O Signal Listings ............ 41 2.3 Footprint and Ballout Assignments .......... 46 Electrical Specifications .... 57 3.1 Absolute Maximum Ratings ............ 57 3.2 Recommended Operating Conditions ...... 58
Chapter 2
Chapter 3
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Table of Contents
February 6, 2003
3.3 3.4 3.5 3.6
3.2.1 Core Voltage ...... 58 3.2.2 Other Voltages and Temperature Range ........... 59 3.2.3 PLL Supply Core Voltage Tracking/Clamp.........60 3.2.4 PLLVDD/CVDD Tracking/Clamp Circuit Bypass ......... 61 Power Supply Current ...... 62 Thermal Design and ACPI Power....63 DC Specifications for I/O Signals .... 64 Timing Specifications for I/O Signals ........ 66 3.6.1 General AC Testing Conditions..66 3.6.2 Power On Specifications ............ 67 3.6.3 Input Clocks ....... 69 3.6.4 DDR SDRAM Interface ..... 71 3.6.5 SDR SDRAM Interface......77 3.6.6 PCI Interface ...... 82 3.6.7 Southbridge Sidebands and Power Management Interface.......82 3.6.8 Debug Interface..83 3.6.9 Code Morphing Software Boot ROM Interface...84 3.6.10 Configuration (Mode-bit) ROM Interface ............ 85 3.6.11 JTAG Interface ... 86
Chapter 4
Mechanical Specifications ..........87 4.1 Thermal Specifications ..... 87 4.2 Package Dimensions ........ 87 4.3 Package Marking.....90
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February 6, 2003
List of Tables
Table 1: Table 2: Table 3: Table 4: Table 5: Table 6: Table 7: Table 8: Table 9: Table 10: Table 11: Table 12: Table 13: Table 14: Table 15: Table 16: Table 17: Table 18: Table 19: Table 20: Table 21: Table 22: Table 23: Table 24: Table 25: Table 26: Table 27: Table 28: Table 29: Table 30: Table 31: Table 32: Table 33: Table 34: Table 35: Table 36: Table 37: Table 38: Table 39: Table 40: Table 41: Table 42:
System Power Management States ......... 13 Processor Power Management States ..... 14 LongRun Power Management Specifications .... 17 DDR SDRAM Memory Configurations...... 19 SDR SDRAM Memory Configurations ...... 21 DDR SDRAM Base Memory Configurations...... 23 SDR SDRAM Base or Expansion Memory Configurations ........ 24 PCI Bus Commands Supported.......... 27 Core Clock Multipliers and PCI Interface Divisors ...... 30 Power-On Default VRDA Output Values ........... 31 Signal Summary ......... 33 DDR SDRAM Interface Signals .......... 34 Logical Alignment of DDR Byte Enables, Data Strobes and Data Bits ..... 34 SDR SDRAM Interface Signals .......... 35 Logical Alignment of SDR Clocks, Clock Enables, and Chip Selects ....... 35 Logical Alignment of SDR Byte Enables and Data Bits .... 35 Memory Address Translations ... 36 PCI Interface Signals ........ 37 Southbridge Sideband Interface Signals ........... 38 Serial Interface Signals ..... 38 Thermal/Power/System Management Signals... 39 JTAG Interface and Debug Signals .......... 39 Reserved and No Connection Signals...... 40 Core Voltage Sniff Signals......... 40 Power and Ground Signals........ 40 Input Only Signals............. 41 Output Only Signals.......... 43 Bidirectional Signals ......... 45 Signal Ballout Assignments - Sorted by Ball Number ....... 48 Signal Ballout Assignments - Sorted by Signal Name ...... 52 Absolute Maximum Ratings ....... 57 Core Voltage Specifications....... 58 Other Voltage and Temperature Specifications.......... 59 Power Supply Current Specifications ....... 62 Power Specifications ........ 63 DC Specifications for All Signals Except PCI and DDR SDRAM Interfaces ...... 64 DC Specifications for DDR SDRAM Interface ... 64 DC Specifications for PCI Interface .......... 65 Thermal Diode Specifications .... 65 General AC Testing Conditions .......... 66 Power On Specifications............ 67 Timing Specifications for Input Clocks...... 69
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Others parts begin by 55
55-1 55-2 55-3 55-4 55-5 55-6
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