|
Details, datasheet, quote on part number:UTCTL5001
| |
| Part: | UTCTL5001 |
| Category: | Power Management => Power Supply Controllers |
| Description: | Description = Low Operating Voltage Single Ended PWM ic ;; Package = DIP-8, SOP-8 ;; |
| Company: | Unisonic Technologies |
| Datasheet: | Download UTCTL5001 datasheet File size : 202 kB |
| Request For quote: | Find where to buy UTCTL5001
|
| |
Datasheet text preview:
UTC TL5001
LINEAR INTEGRATED CIRCUIT
PULSE-WIDTH-MODULATION CONTROL CIRCUITS
DESCRIPTION
The UTC TL5001 incorporates on a single monolithic chip all the functions required for a pulse-width modulation (PWM) control circuit. Designed primarily for power-supply control, It contains an error amplifier, a regulator, an oscillator, a PWM comparator with a dead-time-control input, undervoltage lockout (UVLO),short-circuit protection(SCP),and an open-collector output transistor. The error-amplifier common-mode voltage ranges from 0V to 1.5V. The noninverting input of the error amplifier is connected to a 1-V reference. Dead-time control (DTC) can be set to provide 0% to 100% dead time by connecting an external resistor between DTC and GND. The oscillator frequency is set by terminating RT with an external resistor to GND. During low Vcc conditions, the UVLO circuit turns the output off until Vcc recovers to its normal operating range.
SOP-8
DIP-8
FEATURES
*Complete PWM power control *3.6-V to 40-V Operation *Internal Undervoltage-Lockout Circuit *Internal Short-Circuit Protection *Oscillator Frequency : 20kHz to 500kHz *Variable Dead Timer Provides Control Over Total Range
UTC
UNISONIC TECHNOLOGIES
CO., LTD.
1
QW-R103-016,A
UTC TL5001
VI +
LINEAR INTEGRATED CIRCUIT
SCHEMATIC FOR TYPICAL APPLICATION
TSP1101 2 VCC SCP V0 + 1
V0
5
COMP 3 UTC TL5001 6 7 DTC RT GND 8 FB 4
FUNCTIONAL BLOCK DIAGRAM
V CC 2 UVLO
RT 7
DT C 6
O UT 1
IDT 1V 1.5V
Error A m p l i fi e r Reference V o l ta g e
2.5V 1V OSC PW M/DTC Comparator
scp Comparator 1
FB 4 COMP 3
+ sc p Com parator 2
SCP
5
8 GND
UTC
UNISONIC TECHNOLOGIES
CO., LTD.
2
QW-R103-016,A
UTC TL5001
DETAILED DESCRIPTION
VOLTAGE REFERENCE
LINEAR INTEGRATED CIRCUIT
A 2.5-V regulator operating from Vcc is used to power the internal circuitry of the TL5001 and as a reference for the error amplifier and SCP circuit. A resistive divider provides a 1-V reference for the error amplifier noninverting input which typically is within 2% of nominal over the operating temperature range.
ERROR AMPLIFIER
The error amplifier compares a sample of the dc-to-dc converter output voltage to the 1-V reference and generates an error signal for the PWM comparator. The dc-to-dc converter output voltage is set by selecting the error amplifier gain(see Figure 1),using the following expression. Vo=(1+R1/R2) (1V)
VI(FB)
Compensation Network R1 R2
3 COMP 4 FB + 8 GND Vref=1V To PWM Comparator
Figure 1.Error-Amplifier Gain Setting
The error-amplifier output is brought out as COMP for use in compensating the dc-to-dc converter control loop for stability. Because the amplifier can only source 45µA,the total dc load resistance should be 100k or more.
OSCILLATOR/PWM
The oscillator frequency (fosc) can be set between 20kHz and 500kHz by connecting a resistor between RT and GND .Acceptable resistor values range from 15 kto 250 kThe oscillator frequency can be determined by using the graph shown in Figure 5. The oscillator output is a triangular wave with a minimum value of approximately 0.7V and a maximum value of approximately 1.3V. The PWM comparator compares the error-amplifier output voltage and the DTC input voltage to the triangular wave and turns the output transistor off whenever the triangular wave is greater than the lesser of the two inputs.
DEAD TIME CONTORL (DTC)
DTC provides a means of limiting the output switch duty cycle to a value less than 100%, which is critical for boost and flyback converters. A current source generates a reference current (IDT) at DTC that is nominally equal to the current at the oscillator timing terminal, RT. Connecting a resistor between DTC and GND generates a dead-time reference voltage (VDT), which the PWM/DTC comparator compares to the oscillator triangle wave as described in the previous section. Nominally, the maximum duty cycle is 0% when VDT is 0.7V or less and 100% when VDT is 1.3V or greater. Because the triangle wave amplitude is a function of frequency and the source impedance of RT is relatively high(1250),choosing RDT for a specific maximum duty cycle, D, is accomplished using the following equation and the voltage limits for the frequency in question as found in Figure 11(Voscmax and Voscmin are the maximum and minimum oscillator levels): RDT=(Rt +1250)[D(Vosc max-Vosc min)+Vosc min] Where RDT and Rt are in ohms,D in decimal
UTC
UNISONIC TECHNOLOGIES
CO., LTD.
3
QW-R103-016,A
|
|
