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Part: CS2845LN8
Category:
Power Management
-> PWM Controllers
Description: Current Mode PWM Control Circuit With 50% Max Duty Cycle
Company: Cherry Semiconductor (acquired by ON Semiconductor)
Datasheet: Download CS2845LN8 datasheet File size : 243 kB
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Datasheet text preview:
CS2844/3845 SERIES
CS2844/CS3844 CS2845/CS3845
Current Mode PWM Control Circuit with 50% Max Duty Cycle
Description
The CS3844/45 provides all the necessary features to implement off-line fixed frequency current-mode control with a minimum number of external components. The CS3844 family incorporates a new precision temperature-controlled oscillator to minimize variations in frequency. An internal toggle flip-flop, which blanks the output every other clock cycle, limits the duty-cycle range to less than 50%. An undervoltage lockout ensures that VREF is stabilized before the output stage is enabled. In the CS2844/CS3844 turn on occurs at 16V and turn off at 10V. In the CS2845/CS3845 turn on is at 8.4V and turn off at 7.6V. Other features include low start-up current, pulse-by-pulse current limiting, and a high-current totem pole output for driving capacitive loads, such as gate of a power MOSFET. The output is low in the off state, consistent with N-channel devices.
Features
s Optimized for Offline Control s Temp. Compensated Oscillator s 50% Max Duty-cycle Clamp s VREF Stabilized before Output Stage is Enabled s Low Start-up Current s Pulse-by-pulse Current Limiting s Improved Undervoltage Lockout s Double Pulse Suppression s 1% Trimmed Bandgap Ref. s High Current Totem Pole Output
Absolute Maximum Ratings
Supply Voltage (ICC<30mA).......Self Limiting Supply Voltage (Low Impedance Source) ........30V Output Current.....±1A Output Energy (Capacitive Load) ........5µJ Analog Inputs (VFB, VSENSE) .......-0.3V to 5.5V Error Amp Output Sink Current ...........10mA
Package Options
8 Lead PDIP & SO Narrow
COMP VFB Sense OSC
1 2 3 4 8 7 6 5
Lead Temperature Soldering Wave Solder (through hole styles only) ..........10 sec. max, 260°C peak Reflow (SMD styles only) ...........60 sec. max above 183°C, 230°C peak Block Diagram
VREF VCC VOUT Gnd
14 Lead SO Narrow
VCC V C C Undervoltage Lock-out
COMP 1
14 13 12 11 10 9 8
VREF NC VCC VCC Pwr VOUT Gnd Pwr Gnd
V C C Pwr
NC 2 VFB 3
34V Gnd 16V/10V (8.4V/7.6V) VFB Error Amplifier + OSC 2.50V
Set/ 5 . 0 Volt Reset Reference Internal Bias R R To g g l e Flip-Flop NOR VREF Undervoltage Lockout
VREF
NC 4 Sense 5 NC 6 OSC 7
COMP
16 Lead SO Wide
NC 1 NC 2
16 15 14 13 12 11 10 9
NC VREF VCC VCCPwr VO Gnd Pwr Gnd NC
Oscillator
V O UT
COMP 3 VFB 4
2R R S e nse 1V
S P w r Gnd R Current PWM Sensing Latch Comparator
SENSE 5 OSC 6 NC 7 NC 8
( ) indicates CS-2845/3845
Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: info@cherry-semi.com Web Site: www.cherry-semi.com
Rev. 3/17/99
1
A
®
Company
CS2844/3845 SERIES
Electrical Characteristics: -25 TA 85°C for CS2844/2845, 0 TA 70°C for CS3844/3845. VCC = 15V (Note 1); RT = 10k, CT = 3.3nF for sawtooth mode., unless otherwise stated. CS2844/CS2845 MIN TYP MAX CS3844/CS3845 MIN TYP MAX UNITS
PARAMETER
TEST CONDITIONS
s Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit s Oscillator Section Initial Accuracy Voltage Stability Temperature Stability Amplitude s Error Amp Section Input Voltage Input Bias Current AVOL Unity Gain Bandwidth PSRR Output Sink Current Output Source Current VOUT HIGH VOUT LOW s Current Sense Section Gain Maximum Input Signal PSRR Input Bias Current Delay to Output s Output Section Output Low Level Output High Level Rise Time Fall Time ISINK=20mA ISINK=200mA ISOURCE=20mA ISOURCE=200mA TJ=25°C, CL=1nF (Note 2) TJ=25°C, CL=1nF (Note 2) 13.0 12.0 0.1 1.5 13.5 13.5 50 50 150 150 0.4 2.2 13.0 12.0 0.1 1.5 13.5 13.5 50 50 150 150 0.4 2.2 V V V V ns ns (Notes 3 & 4) VCOMP=5V (Note 3) 12VCC25V (Note 3) VSense=0V TJ=25°C (Note 2) 2.85 0.9 3.00 1.0 70 -2 150 -10 300 3.15 1.1 2.85 0.9 3.00 1.0 70 -2 150 -10 300 3.15 V/V 1.1 V dB µA ns VCOMP=2.5V VFB=0V 2VOUT4V (Note 2) 12VCC25V VFB=2.7V, VCOMP=1.1V VFB=2.3V, VCOMP=5V VFB=2.3V, RL=15k to Gnd VFB=2.7V, RL=15k to VREF 65 0.7 60 2 -0.5 5 2.45 2.50 -0.3 90 1.0 70 6 -0.8 6 0.7 1.1 2.55 -1.0 65 0.7 60 2 -0.5 5 2.42 2.50 -0.3 90 1.0 70 6 -0.8 6 0.7 1.1 2.58 V -2.0 µA dB MHz dB mA mA V V Sawtooth Mode, TJ=25°C 12VCC25V Sawtooth Mode TMINTATMAX (Note 2) VOSC (peak to peak) 47 52 0.2 5 1.7 57 1.0 47 52 0.2 5 1.7 57 1.0 kHz % % V TJ=25°C, IREF=1mA 12VCC25V 1IREF20mA (Note 2) Line, Load, Temp. (Note 2) 10Hz f10kHz, TJ=25°C (Note 2) TA=125°C, 1000 Hrs. (Note 2) TA=25°C -30 4.90 50 5 -100 25 -180 -30 4.95 5.00 6 6 0.2 5.05 20 25 0.4 5.10 4.82 50 5 -100 25 4.90 5.00 6 6 0.2 5.10 V 20 25 0.4 mV mV mV/°C µV mV -180 mA
5.18 V
2
CS2844/3845 SERIES
Electrical Characteristics: -25TA85°C for CS2844/2845, 0TA70°C for CS3844/3845. VCC=15V (Note 1); RT=10k, CT=3.3nF for sawtooth mode., unless otherwise stated. PARAMETER TEST CONDITIONS CS2844/CS2845 MIN TYP MAX CS3844/CS3845 MIN TYP MAX UNITS
s Total Standby Current Start-Up Current Operating Supply Current VCC Zener Voltage s PWM Section Maximum Duty Cycle Minimum Duty Cycle
CS2844 TYP MAX
0.5 VFB=VSense=0V RT=10k, CT=3.3nF ICC=25mA 11 34
1.0 17
0.5 11 34
1.0 17
mA mA V
46
48
50 0
46
48
50 0
% %
PARAMETER
TEST CONDITIONS
MIN
MIN
CS3844 TYP MAX
CS2845/CS3845 MIN TYP MAX UNITS
s Under-Voltage Lockout Section Start Threshold Min. Operating Voltage
Notes:
15 After Turn On 9
16 10
17 11
14.5 8.5
16 10
17.5 11.5
7.8 7.0
8.4 7.6
9.0 8.2
V V
1. Adjust Vcc above the start threshold before setting at 15V. 2.These parameters, although guaranteed, are not 100% tested in production.
3. Parameter measured at trip point of latch with VFB=0. 4. Gain defined as: A= VCOMP VSense ; 0 VSense 0.8V.
Package Pin Description
PACKAGE PIN # PIN SYMBOL FUNCTION
8L PDIP/SO 1 2 3 4 5
14L SO Narrow 1 3 5 7 9 8
16L SO Wide 3 4 5 6 11 10 12 13 14 15 1,2,7,8,9,16 COMP VFB Sense OSC Gnd Pwr Gnd VOUT VCCPwr VCC VREF NC Error amp output, used to compensate error amplifier. Error amp inverting input. Noninverting input to Current Sense Comparator. Oscillator timing network with Capacitor to Ground, resistor to VREF. Ground. Output driver Ground. Output drive pin. Output driver positive supply. Positive power supply. Output of 5V internal reference. No Connection.
6
10 11
7 8
12 14 2,4,6,13
3
CS2844/3845 SERIES
Test Circuit Open Loop Laboratory Test Fixture
VREF RT
2N2222 100k 4.7k 1k E r r o r Amp Adjust 4.7k 5k
A COMP VREF
0.1µF
VCC
VFB
VCC
0.1µF 1k 1W
S e nse Adjust
S e nse
V O UT
V O UT
OSC
Gnd
Gnd CT
Circuit Description Undervoltage Lockout During Undervoltage Lockout (Figure 1), the output driver is biased to sink minor amounts of current. The output should be shunted to ground with a resistor to prevent activating the power switch with extraneous leakage currents. PWM Waveform To generate the PWM waveform, the control voltage from the error amplifier is compared to a current sense signal which represents the peak output inductor current (Figure 2). An increase in VCC causes the inductor current slope to increase, thus reducing the duty cycle. This is an inherent feed-forward characteristic of current mode control, since the control voltage does not have to change during changes of input supply voltage. When the power supply sees a sudden large output current increase, the control voltage will increase allowing the duty cycle to momentarily increase. Since the duty cycle tends to exceed the maximum allowed to prevent transformer saturation in some power supplies, the internal oscillator waveform provides the maximum duty cycle clamp as programmed by the selection of OSC components.
VCC
O N / O F F Command t o reset of IC
CSX844 VON VOFF 16V 10V
CSX845 8.4V 7.6V
ICC
<15mA <1mA VON VOFF VCC
Figure 1: Startup voltage for CSX844 and CSX845.
4
CS2844/3845 SERIES
Circuit Description: continued
Setting the Oscillator
VOSC OSC RESET Toggle F/F Output EA Output Switch Current VCC
The times Tc and Td can be determined as follows: t c = RTCT ln
t d = RTCT ln
( (
VREF - Vlower VREF - Vupper
) )
VREF - IdRT - Vlower VREF - IdRT - Vupper
IO
Substituting in typical values for the parameters in the above formulas: VREF = 5.0V, Vupper = 2.7V, Vlower = 1.0V, Id = 8.3mA, then tc 0.5534RTCT td = RTCT ln
VO
Figure 2: Timing Diagram
(
2.3 - 0.0083 RT 4.0 - 0.0083 RT
)
For better accuracy RT should be 10k.
Vupper Vlower ton tC ton = tC toff = tC+2td
Figure 3: Duty Cycle parameters.
Grounding
toff td
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to Gnd in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to Sense.
5
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