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Part: HM621400HLJP-12
Category: Memory -> SRAM
Description: 4m High Speed SRAM ( 4-mword X 1-bit )
Company: Hitachi Semiconductor (acquired by Renesas)
Datasheet: Download HM621400HLJP-12 datasheet File size : 256 kB
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Datasheet text preview:
HM621400H Series
4M High Speed SRAM (4-Mword × 1-bit)
ADE-203-787D (Z) Rev. 1.0 Sep. 15, 1998 Description
The HM621400H is a 4-Mbit high speed static RAM organized 4-Mword × 1-bit. It has realized high speed access time by employing CMOS process (4-transistor + 2-poly resistor memory cell)and high speed circuit designing technology. It is most appropriate for the application which requires high speed and high density memory, such as cache and buffer memory in system. The HM621400H is packaged in 400-mil 32-pin SOJ for high density surface mounting.
Features
· Single 5.0 V supply : 5.0 V ± 10 % · Access time 10/12/15 ns (max) · Completely static memory No clock or timing strobe required · Equal access and cycle times · Directly TTL compatible All inputs and outputs · Operating current: 200/180/160 mA (max) · TTL standby current: 70/60/50 mA (max) · CMOS standby current: 5 mA (max) : 1.2 mA (max) (L-version) · Data retension current: 0.8 mA (max) (L-version) · Data retension voltage: 2 V (min) (L-version) · Center VCC and VSS type pinout
HM621400H Series
Ordering Information
Type No. HM621400HJP-10 HM621400HJP-12 HM621400HJP-15 HM621400HLJP-10 HM621400HLJP-12 HM621400HLJP-15 Access time 10 ns 12 ns 15 ns 10 ns 12 ns 15 ns Package 400-mil 32-pin plastic SOJ (CP-32DB)
Pin Arrangement
HM621400HJP/HLJP Series A0 A1 A2 A3 A4 A5 CS VCC VSS Din WE A6 A7 A8 A9 A10 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 (Top view) 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A21 A20 A19 A18 A17 A16 V OE
SS
VCC Dout A15 A14 A13 A12 A11 NC
2
HM621400H Series
Pin Description
Pin name A0 to A21 D in Dout CS OE WE VCC VSS NC Function Address input Data input Data output Chip select Output enable Write enable Power supply Ground No connection
Block Diagram
(LSB) A2 A18 A8 A12 A17 A3 A7 A6 (MSB) Din Column I/O Column decoder CS Dout
Row decoder
Memory matrix 256 rows × 64 columns × 256 blocks × 1 bit (4,194,304 bits)
Internal voltage generater
VCC VSS
CS
A11 A9 A10 A20 A21 A0 A13 A14 A15 A1 A19 A16 A4 A5
CS WE OE CS
(LSB)
(MSB)
3
Others parts begin by hm
HM-1 HM-2 HM-3 HM-4 HM-5 HM-6 HM-7 HM-8 HM-9 HM-10 HM-11 HM-12 HM-13
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