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Details, datasheet, quote on part number:HYB3117405BJ-70
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Datasheet text preview:
3.3V 4M x 4-Bit EDO-Dynamic RAM
HYB3116405BJ/BT(L) -50/-60/-70 HYB3117405BJ/BT(L) -50/-60/-70
Advanced Information
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4 194 304 words by 4-bit organization 0 to 70 °C operating temperature Performance -50 tRAC tCAC tAA tRC tHPC RAS access time CAS access time Access time from address Read/Write cycle time Hyper page mode (EDO) cycle time 50 13 25 84 20 -60 60 15 30 104 25 -70 70 20 35 124 30 ns ns ns ns ns
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Single + 3.3 V (± 0.3V ) supply Low power dissipation max. 396 active mW (HYB3117405BJ/BT-50) max. 363 active mW (HYB3117405BJ/BT-60) max. 330 active mW (HYB3117405BJ/BT-70) max. 360 active mW (HYB3116405BJ/BT-50) max. 324 active mW (HYB3116405BJ/BT-60) max. 288 active mW (HYB3116405BJ/BT-70) 7.2 mW standby (LV-TTL) 3.6 mW standby (LV-CMOS) 720 µW standby for L-version Output unlatched at cycle end allows two-dimensional chip selection Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh, Self Refresh and test mode Hyper page mode (EDO) capability All inputs, outputs and clocks fully TTL-compatible 2048 refresh cycles / 32 ms for HYB3117405 4096 refresh cycles / 64 ms for HYB3116405 Plastic Package: P-SOJ-26/24-1 (300 mil) P-TSOPII-26/24-1 (300mil)
Semiconductor Group
1
3.96
HYB 3116(7)405BJ/BT(L) -50/-60/-70 3.3V 4Mx4-DRAM
The HYB 3116(7)405BJ/BT(L) is a 16MBit dynamic RAM organized as 4194304 words by 4-bits. The HYB 3116(7)405BJ/BT(L) utilizes a submicron CMOS silicon gate process technology, as well as advanced circuit techniques to provide wide operating margins, both internally and for the system user. Multiplexed address inputs permit the HYB 3116(7)405BJ/BT(L) to be packaged in a standard SOJ 26/24 300 mil or TSOPII-26/24 300 mil wide plastic package. These packages provide high system bit densities and are compatible with commonly used automatic testing and insertion equipment. System-oriented features include single + 3.3 V (± 0.3 V) power supply, direct interfacing with high-performance logic device families.The HYB3116405BTL parts have a very low power ,,sleep mode" supported by Self Refresh.
Ordering Information Type
HYB 3117405BJ-50 HYB 3117405BJ-60 HYB 3117405BJ-70 HYB 3117405BT-50 HYB 3117405BT-60 HYB 3117405BT-70 HYB 3116405BJ-50 HYB 3116405BJ-60 HYB 3116405BJ-70 HYB 3116405BT-50 HYB 3116405BT-60 HYB 3116405BT-70 HYB 3116405BTL-50 HYB 3116405BTL-60 HYB 3116405BTL-70 Q67100-Q1143 Q67100-Q1144 Q67100-Q1186 on request on request on request Q67100-Q1135 Q67100-Q1136 Q67100-Q1184 Q67100-Q1127 Q67100-Q1128
Ordering Code
Q67100-Q1119 Q67100-Q1120
Package
P-SOJ-26/24-1 300 mil P-SOJ-26/24-1 300 mil P-SOJ-26/24-1 300 mil P-TSOPII-26/24-1 300 mil P-TSOPII-26/24-1 300 mil P-TSOPII-26/24-1 300 mil P-SOJ-26/24-1 300 mil P-SOJ-26/24-1 300 mil P-SOJ-26/24-1 300 mil P-TSOPII-26/24-1 300 mil P-TSOPII-26/24-1 300 mil P-TSOPII-26/24-1 300 mil P-TSOPII-26/24-1 300 mil P-TSOPII-26/24-1 300 mil P-TSOPII-26/24-1 300 mil
Descriptions
DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) LP-DRAM (access time 50 ns) LP-DRAM (access time 60 ns) LP-DRAM (access time 70 ns)
Semiconductor Group
2
HYB 3116(7)405BJ/BT(L) -50/-60/-70 3.3V 4Mx4-DRAM
Vcc I/O1 I/O2 WE RAS N.C. A10 A0 A1 A2 A3 VCC
1 2 3 4 5 6 8 9 10 11 12 13
26 25 24 23 22 21 19 18 17 16 15 14
Vss I/O4 I/O3 CAS OE A9 A8 A7 A6 A5 A4 Vss
Vcc I/O1 I/O2 WE RAS A11 A10 A0 A1 A2 A3 VCC
1 2 3 4 5 6 8 9 10 11 12 13
26 25 24 23 22 21 19 18 17 16 15 14
Vss I/O4 I/O3 CAS OE A9 A8 A7 A6 A5 A4 Vss
HYB3117405BJ/BT
HYB3116405BJ/BT
P-SOJ-26/24-1 (300mil) P-TSOPII-26/24-1 (300mil)
Pin Configuration Pin Names A0 to A10 A0 to A11 A0 to A9 RAS OE I/O1 -I/O4 CAS WE Row & Column Address Inputs for HYB3117405 Row Address Inputs for HYB3116405 Column Address Inputs for HYB3116405 Row Address Strobe Output Enable Data Input/Output Column Address Strobe Read/Write Input Power Supply (+ 3.3 V) Ground (0 V) not connected
VCC VSS
N .C.
Semiconductor Group
3
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