Details, datasheet, quote on part number: HYM72V1635GS-50
PartHYM72V1635GS-50
Category
Description16m X 72-bit Edo-dram Module
CompanySiemens (acquired by Infineon Technologies Corporation)
DatasheetDownload HYM72V1635GS-50 datasheet
  

 

Features, Applications
72-Bit EDO-DRAM Module (ECC - Module) 168pin buffered DIMM Module

168 Pin JEDEC Standard, Buffered 8 Byte Dual In-Line Memory Module for PC main memory applications 1 bank x 72 organisation Optimized for ECC applications Extended Data Out ( EDO ) Performance:

-50 tRAC tCAC tAA tRC tHPC RAS Access Time CAS Access Time Access Time from Address Cycle Time EDO Mode Cycle Time 25 ns

Single 0.3V) supply CAS-before-RAS refresh, RAS-only-refresh Decoupling capacitors mounted on substrate All inputs, outputs and clock fully LVTTL & LVCMOS compatible 4 Byte interleave enabled, Dual Address inputs (A0/B0) Buffered inputs excepts RAS and DQ Parallel Presence detects Utilizes eighteen 400mil wide 4 - EDO- DRAMs and BiCMOS buffers/line drivers Two versions : HYM 72V1635GS with TSOPII-components (4 mm thickness) HYM 72V1625GS with SOJ-components (9 mm thickness) 4096 refresh cycles 64 ms with / 12 addressing Gold contact pad Double sided module with mm (1500 mil) height

The HYM a 128 MByte DRAM module organized 777 216 words a 168-pin, dual read-out, single-in-line package comprising eighteen HYB 4 EDO-DRAMs in 400 mil wide TSOPII or SOJ- packages mounted together with ceramic decoupling capacitors a PC board. All inputs except RAS and DQ are buffered by using BiCMOS buffers/line drivers. Each HYB 3164405AT/AJ is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed. The density and speed of the module can be detected by the use of presence detect pins.

Ordering Information Type HYM 72V1625GS-50 HYM 72V1625GS-60 HYM 72V1635GS-50 HYM 72V1635GS-60 Pin Names OE0, OE2 Vcc Vss - PD8 PDE , ID1 N.C. Presence-Detect and ID-pin Truth Table: Module ID0 ID1 Vss PD8 0 Address Input Data Input/Output Row Address Strobe Column Address Strobe Read / Write Input Output Enable Power (+3.3 Volt) Ground Presence Detect Pins Presence Detect Enable ID indentification bit No Connection Ordering Code Package L-DIM-168-9 Descriptions 3.3V 50ns EDO-DRAM module 3.3V 60ns EDO-DRAM module 3.3V 50ns EDO-DRAM module 3.3V 60ns EDO-DRAM module

Note: 1 = High Level ( Driver Output) 0 = Low Level (Driver Output) for PDE active ( ground). For PDE at a high level all PD terminal are in tri-state.

PIN Symbol VSS DQ2 DQ3 VCC DQ7 DQ8 VSS DQ12 DQ13 VCC DQ16 DQ17 VSS NC VCC RAS0 OE0 VSS A10 NC VCC NC PIN Symbol VSS NC WE2 VCC DQ18 DQ19 VSS DQ22 DQ23 VCC DQ26 DQ27 VSS DQ30 DQ31 VCC DQ34 DQ35 VSS PD7 ID0 (VSS) VCC PIN Symbol VSS DQ38 DQ39 VCC DQ43 DQ44 VSS DQ48 DQ49 VCC DQ52 DQ53 VSS NC VCC NC VSS A11 NC VCC NC B0 PIN Symbol VSS NC PDE VCC DQ54 DQ55 VSS DQ58 DQ59 VCC DQ62 DQ63 VSS DQ66 DQ67 VCC DQ70 DQ71 VSS PD8 ID1 (VSS) VCC


 

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