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Details, datasheet, quote on part number:MT91L60
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| Part: | MT91L60 |
| Category: | Communication => ISDN => Codec/Audio Interface |
| Description: | ISO2-cmos 3 Volt Multi-featured Codec ( MFC ) |
| Company: | Mitel Networks Corporation |
| Datasheet: | Download MT91L60 datasheet File size : 170 kB |
| Request For quote: | Find where to buy MT91L60
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Datasheet text preview:
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ISO2-CMOS MT91L60 3 Volt Multi-Featured Codec (MFC) Advance Information
Feature s
· · · · · · · · · · · S in gl e 2.7-3.6 volt supply operation P r og r am m ab le µ-Law/A-Law Codec and Filters P r o g r a m m ab le ITU-T (G.711)/sign-magnitude coding P r og r am m ab le transmit, receive and side-tone gains Fu ll y differential interface to handset transducers - including 300 ohm receiver driver Fl ex i bl e digital interface including ST-BUS/SSI S e r i al microport S in gl e 3 volt supply Lo w power operation I TU - T G.714 compliant M u l ti p l e power down modes
ISS UE 1
May 1995
O rd er i ng Information M T 9 1L 6 0 A E 24 Pin Plastic DIP M T 9 1L 6 0 A S 20 Pin SOIC -40°C to +85°C
Des cr ip t io n
The MT91L60 3V Multi-featured Codec incorporates a built-in Filter/Codec, gain control and programmable sidetone path as well as on-chip anti-alias filters, reference voltage and bias source. The device supports both A-Law and µ-Law requirement s. The MT91L60 is a true 3V device em ploy ing a fully differential architecture to ensure wide dynamic range. Complete telephony interfaces are provided for connec tion to handset transducers. Internal register access is provided through a serial microport c o m p a t i b le with various industry standard m i c r o - c o n t r ol l e r s . The MT91L60 is fabricated in Mitel's ISO2-CMOS technology ensuring low power consumption and high reliability.
Ap p l ic a t io n s
· · · · · · B at t er y operated equipment D i git a l telephone sets C el lu la r radio sets Lo c al area communications stations P ai r Gain Systems Li ne cards
VSSD VDD V SSA VB ia s VRe f
FILTER/COD EC GAIN AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAACAADERAAAAAd BAAAA EN O 7 AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAACAADERAAA-7 dBAAAA DE O AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAA AAAA A AAAA AAAA AA
MM+ Transducer Interface
HSP KR + HSP KR -
Din Do ut S TB/F 0i CL OCKin Flexib le Di gi tal Interface
Timing
ST-BUS C&D Channels Serial Microport A/µ/IRQ
PWRST
IC
CS
DATA1
DATA2
SCLK
F i g ur e 1 - Functional Block Diagram
7-107
MT91L60
Advance Information
20 PIN SOIC
VBias VRef PWRST IC A/µ /IRQ VSSD CS SCLK DATA1 DATA2
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
M+ MVSSA HSPKR + HS PKR VDD CLOCKin ST B/F0i Di n Dout
24 PIN PDIP
VBias VRef NC PWRST IC A/µ /IRQ VSSD CS NC SCLK DATA1 DATA2
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
M+ MVSSA NC HSPKR + HSP KR VDD CLOCKin NC ST B/F0i Di n Dout
Fi g u re 2 - Pin Connections
Pin Description
Pin # SOIC DIP 1 2 3 4 5 1 2 4 5 6 Nam e VBias VRef P WRS T IC A/µ/IRQ Descri pti on Bias Voltage (Output). (VDD/2) volts is available at this pin for biasing external amplifiers. Connect 0.1 µF capacitor to VSSA. Reference Voltage for Codec (Output). Used internally. Connect 0.1 µF capacitor to VSSA. Power-up Reset (Input). CMOS compatible input with Schmitt Trigger (active low). Internal Connection. Tie externally to VSS for normal operation. A/µ - When internal control bit DEn = 0 this CMOS level compatible input pin governs the companding law used by the filter/Codec; µ-Law when tied to VSS and A-Law when tied to VDD. Logically OR'ed with A/µ register bit. IRQ - When internal control bit DEn = 1 this pin becomes an open-drain interrupt output signalling valid access to the D-Channel registers in ST-BUS mode. Digital Ground. Nominally 0 volts. Chip Select (Input). This input signal is used to select the device for microport data transfers. Active low. CMOS level compatible. Serial Port Synchronous Clock (Input). Data clock for microport. CMOS level compatible. Bidirectional Serial Data. Port for microprocessor serial data transfer. In Motorola/ National mode of operation, this pin becomes the data transmit pin only and data receive is performed on the DATA 2 pin. Input CMOS level compatible. Serial Data Receive. In Motorola/National mode of operation, this pin is used for data receive. In Intel mode, serial data transmit and receive are performed on the DATA 1 pin and DATA 2 is disconnected. Input CMOS level compatible.
6 7 8 9
7 8 10 11
VSSD CS SCLK DATA 1
10
12
DATA 2
7-1 08
Advance Information
Pin Description (continued)
Pin # SOIC DIP 11 13 Nam e Dout Description
MT91L60
Data Output. A high impedance three-state digital output for 8 bit wide channel data being sent to the Layer 1 transceiver. Data is shifted out via this pin concurrent with the rising edge of the bit clock during the timeslot defined by STB, or according to standard ST-BUS timing. Data Input. A digital input for 8 bit wide channel data received from the Layer 1 transceiver. Data is sampled on the falling edge of the bit clock during the timeslot defined by STB, or according to standard ST-BUS timing. Input level is CMOS compatible. Data Strobe/Frame Pulse (Input). For SSI mode this input determines the 8 bit timeslot used by the device for both transmit and receive data. This active high signal has a repetition rate of 8 kHz. Standard frame pulse definitions apply in ST-BUS mode. CMOS level compatible input.
12
14
Din
13
15
STB/F0i
14
17
CLOCKin Clock (Input). (CMOS level compatible). The clock provided to this input pin is used for the internal device functions. For SSI mode connect the bit clock to this pin when it is 512 kHz or greater. Connect a 4096 kHz clock to this input when the available bit clock is 128 kHz or 256 kHz. For ST-BUS mode connect C4i to this pin. VDD Positive Power Supply (Input). Nominally 3 volts.
15 16 17 18 19 20
18 19 20 22 23 24 3,9, 16,21
HSPKR- Inverting Handset Speaker (Output). Output to the handset speaker (balanced). HSPKR+ Non-Inverting Handset Speaker (Output). Output to the handset speaker (balanced). VSSA MM+ NC Analog Ground (Input). Nominally 0 volts. Inverting Microphone (Input). Inverting input to microphone amplifier from the handset microphone. Non-Inverting Microphone (Input). Non-inverting input to microphone amplifier from the handset microphone. No Connect. (DIP Package only).
7- 109
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