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Part: AD404M82RSA-5
Category:
Power Management
-> Battery Management
Description: Low Voltage Operation is More Suitable to be Used on Battery Backup, Portable Electronic
Company: International Power Sources, Inc.
Datasheet: Download AD404M82RSA-5 datasheet File size : 660 kB
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Datasheet text preview:
ASCEND Semiconductor 4Mx4 EDO Data sheet
Rev.1
Page 1
AD 40 4M 4 2 V S A 5
Ascend Semiconductor
EDO/FPM D-RAMBUS DDRSDRAM DDRSGRAM SGRAM SDRAM
: : : : : :
40 41 42 43 46 48
Density 16M : 16 Mega Bits 8M : 8 Mega Bits 4M : 4 Mega Bits 2M : 2 Mega Bits 1M : 1 Mega Bit Organization 4: x4 8 : x8 9 : x9 16 : x16 18 : x18 32 : x32 Refresh 1 : 1K 8 : 8K 2 : 2K 6 :16K 4 : 4K
Min Cycle Time ( Max Freq.) -5 : 5ns ( 200MHz ) -6 : 6ns ( 167MHz ) -7 : 7ns ( 143MHz ) -75 : 7.5ns ( 133MHz ) -8 : 8ns ( 125MHz ) -10 : 10ns ( 100MHz ) EDO : -5 (50 ns) -6 (60 ns)
Revision A : 1st B : 2nd C : 3rd D :4th
Interface V: 3.3V R: 2.5V
Package C: CSP B: uBGA T: TSOP Q: TQFP P: PQFP ( QFP ) L: LQFP S: SOJ
Rev.1
Page 2
Description
The device CMOS Dynamic RAM organized as 4,194,304 words x 4 bits with extended data out access mode. It is fabricated with an advanced submicron CMOS technology and designed to operate from a single 3.3V oniy power supply. Low voltage operation is more suitable to be used on battery backup, portable electronic application. lt is packaged in JEDEC standard 26/24-pin plastic SOJ or TSOP(II).
Features
· Single 3.3V( ± 10 %) only power supply · High speed tRAC acess time: 50/60ns · Low power dissipation - Active mode : 432/396 mW (Mas)
- Standby mode: 0.54 mW (Mas) · Extended - data - out(EDO) page mode access · I/O level: CMOS level (Vcc = 3.3V) · 2048 refresh cycle in 32 ms(Std.) or 128 ms(S-version) · 4 refresh modesh: - RAS only refresh - CAS - before - RAS refresh - Hidden refresh - Self-refresh(S-version)
Rev.1
Page 3
Pin Configuration 26/24-PIN 300mil Plastic SOJ
26/24-PIN 300mil Plastic TSOP (ll)
VCC DQ1 DQ2 WE RAS NC A10 A0 A1 A2 A3 VCC
1 2 3 4 5 6 8 9 10 11 12 13
26 25 24 23 22 21 19 18 17 16 15 14
VSS DQ4 DQ3 CAS OE A9 A8 A7 A6 A5 A4 VSS
VCC DQ1 DQ2 WE RAS NC A10 A0 A1 A2 A3 VCC
1 2 3 4 5 6 8 9 10 11 12 13
26 25 24 23 22 21 19 18 17 16 15 14
VSS DQ4 DQ3 CAS OE A9 A8 A7 A6 A5 A4 VSS
AD404M42VT
AD404M42VS
Pin Description Pin Name A0-A10 Function Address inputs - Row address - Column address - Refresh address Data-in / data-out Row address strobe Column address strobe Write enable Output enable Power (+ 3.3V) Ground A0-A10 A0-A10 A0-A10
DQ1~DQ4 RAS CAS WE OE Vcc Vss
Rev.1
Page 4
Block Diagram
WE
CAS
CONTROL LOGIC
DATA-IN BUFFER DQ1 . . DQ4
NO. 2 CLOCK GENERATOR
DATA-OUT BUFFER OE
COLUMN ADDRESS BUFFERS (11) A0 A1 A2 A3 A4 A5 A6 A7 A8 A9
ROW DECODER
COLUMN DECODER
REFRESH CONTROLLER
2048
SENSE AMPLIFIERS I/O GATING REFRESH COUNTER 2048x4
A10
ROW ADDRESS BUFFERS (11)
2048x2048x4 MEMORY ARRAY
2048
RAS
NO. 1 CLOCK GENERATOR
Vcc Vss
Rev.1
Page 5
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